參數(shù)資料
型號(hào)： NCN6804MNR2G
廠商： ON Semiconductor
文件頁(yè)數(shù)： 6/25頁(yè)
文件大?。?/td> 0K
描述： IC SMART CARD DUAL W/SPI 32-QFN
標(biāo)準(zhǔn)包裝： 1
應(yīng)用： 智能卡
接口： 4 線 SPI 串行
電源電壓： 2.7 V ~ 5.5 V
封裝/外殼： 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 32-QFN（5x5）
包裝： 剪切帶 (CT)
安裝類型： 表面貼裝
其它名稱： NCN6804MNR2GOSCT
NCN6804
http://onsemi.com
14
Figure 3. Startup CRD_VCC Sequence
CS
CRD_VCC
CRD_IO
CRD_CLK
CRD_C4
CRD_C8
CRD_RST
ATR
Figure 4. Measured Typical Startup CRD_VCC
Sequence
At powerup, the CRD_VCCA/B turnon time depends
upon the current capability of the DC/DC converter
associated with the external inductor L and the reservoir
capacitor connected across CRD_VCCA or B and
GROUND. During this sequence, the average input current
is 300 mA typical (see Figure 4), assuming the system is
fully loaded during the start up.
Even if enabled by the builtin sequencer the activation
sequence is under the control and responsibility of the
application software.
On the other hand, at turn off, the CRD_VCCA/B fall time
depends upon the external reservoir capacitor and the peak
current absorbed by the internal NMOS transistor built
across CRD_VCCA/B and Ground. These behaviors are
depicted Figure 5.
Since these parameters have finite values, depending
upon the external constraints, the designer must take care of
these limits if the tON or tOFF provided by the datasheet does
not meet his requirements.
Figure 5. CRD_VCC Typical Turnon and Turnoff
Times
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