SMART CARD INTERFACE SECTION (40°C to +85°C temperature range unless otherwise not" />
參數(shù)資料
型號： NCN6804MNR2G
廠商： ON Semiconductor
文件頁數(shù)： 25/25頁
文件大?。?/td> 0K
描述： IC SMART CARD DUAL W/SPI 32-QFN
標(biāo)準(zhǔn)包裝： 1
應(yīng)用： 智能卡
接口： 4 線 SPI 串行
電源電壓： 2.7 V ~ 5.5 V
封裝/外殼： 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 32-QFN（5x5）
包裝： 剪切帶 (CT)
安裝類型： 表面貼裝
其它名稱： NCN6804MNR2GOSCT
NCN6804
http://onsemi.com
9
SMART CARD INTERFACE SECTION (40°C to +85°C temperature range unless otherwise noted)
Note: Digital inputs undershoot v 0.30V to ground, digital inputs overshoot < VDD + 0.30V
Pin
Symbol
Rating
Min
Typ
Max
Unit
6,19
VOH
VOL
tR
tF
CRD_RSTA/B @ CRD_VCCA/B = 1.8 V, 3.0 V, 5.0 V
Output RESET VOH @ Irst = 200 mA
Output RESET VOL @ Irst = 200 mA
CRD_RSTA/B @ CRD_VCCA/B = 1.8 V, 3.0 V, 5.0 V
Output RESET Risetime @ Cout = 30 pF
Output RESET Falltime @Cout = 30 pF
CRD_VCC – 0.5
CRD_VCC
0.40
100
V
ns
3, 4
21, 22
VOH
VOL
tR
tF
CRD_C4A/B, CRD_C8A/B
@ CRD_VCCA/B = 1.8 V, 3.0 V, 5.0 V
Output VOH @ Irst = 200 mA
Output VOL @ Irst = 200 mA
Output Rise time @ Cout = 30 pF
Output Fall time @Cout = 30 pF
CRD_VCC 0.5
CRD_VCC
0.4
100
V
ns
7, 18
FCRDCLK
VOH
VOL
FCRDDC
tress
tfcs
trills
tulsa
CRD_CLKA/B as a function of CRD_VCCA/B
CRD_VCCA/B = 1.8 V, 3.0 V or 5.0V
Output Frequency
Output VOH @ Icrd_clk = 200mA
Output VOL @ Icrd_clk = 200mA
CRD_CLKA/B Output Duty Cycle
CRD_VCCA/B = 1.8 V, 3.0 V or 5.0 V
Rise & Fall time
@ CRD_VCCA/B = 1.8 V, 3.0 V or 5.0 V
Clock programmed as FST_SLP
Output CRD_CLKA/B Risetime @ Cout = 30 pF
Output CRD_CLKA/B Falltime @ Cout = 30 pF
Rise & Fall time @ CRD_VCCA/B = 1.80V to 5.0V
Clock programmed as SLO_SLP
Output CRD_CLKA/B Risetime @ Cout = 30 pF
Output CRD_CLKA/B Falltime @ Cout = 30 pF
CRD_VCC0.5
45
20
CRD_VCC
0.4
55
4
16
MHz
V
%
ns
5,20
VIH
VIL
VOH
VOL
tR
tF
CRD_IOA/B Input Voltage High Level
@ CRD_VCCA/B = 1.8 V, 3 V and 5 V
CRD_IOA/B Input Voltage Low Level
@ CRD_VCCA/B = 1.8 V, 3 V and 5 V
Output VOH @ Icrd_I/O = 20mA, VIH = VDD
@ CRD_VCCA/B = 1.8 V, 3 V and 5 V
Output VOL @ Icrd_I/O = 500 mA, VIL = 0 V
@ CRD_VCCA/B = 1.8 V, 3 V and 5 V
CRD_IOA/B Rise Time, @ Cout = 30 pF
CRD_IOA/B Fall Time, @ Cout = 30 pF
CRD_VCC*0.6
0.30
CRD_VCC – 0.5
0
CRD_VCC+0.3
0.80
CRD_VCC
0.40
0.8
V
ms
5, 20
RCRDPU
CRD_IOA/B Pull Up Resistor
12
18
24
kW
2, 23
TCRDIN
TCRDOFF
Card Detection digital filter delay:
Card Insertion
Card Extraction
25
50
150
ms
2, 23
VIHDET
Card Insertion or Extraction Positive going Input
High Voltage
0.70 * VCC
VCC
V
2, 23
VILDET
Card Insertion or Extraction Negative going Input
Low Voltage
0
0.30 * VCC
V
3, 4, 5, 6,
19, 20,
21, 22
Icrd
Output peak Max Current under Card Static Operation
Mode @ CRD_VCC = 1.8V, 3.0V, 5.0V
CRD_I/OA/B, CRD_RSTA/B, CRD_C4A/B,
CRD_C8A/B
15
mA
7, 18
Icrd_clk
Output peak Max Current under Card Static Operation
Mode @ CRD_VCC = 1.8 V, 3.0 V, 5.0 V
CRD_CLKA/B
70
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
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