參數(shù)資料
型號： NCN6004AFTBR2G
廠商： ON Semiconductor
文件頁數(shù)： 9/40頁
文件大小： 0K
描述： IC INTERFACE SAM/SIM DUAL 48TQFP
標(biāo)準(zhǔn)包裝： 1
應(yīng)用： PC，PDA
接口： 微控制器
電源電壓： 1.8 V ~ 5.5 V
封裝/外殼： 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 標(biāo)準(zhǔn)包裝
安裝類型： 表面貼裝
其它名稱： NCN6004AFTBR2GOSDKR
NCN6004A
http://onsemi.com
17
PARALLEL/MULITPLEXED OPERATION MODES
The logic input MUX_MODE, pin 44, provides a way to
select the operation mode of the NCN6004A. Depending
upon the logic level, the device operates either in a parallel
mode (all the card pins, on the
mP side, are fully independent)
or in multiplexed mode (all the logic card pins, on the
mP
side, share a common bus). Figure 6 shows a simplified
schematic of the multiplex circuit built in the NCN6004A
chip.
Figure 6. Simplified MUX_MODE Logic and Multiplex Circuit
13
10
11
12
9
19
18
17
16
15
RESET_A
C4_A
C8_A
CLK_IN_A
I/O_A
I/O_B
C8_B
C4_B
REST_B
CLK_IN_B
15
MUX_MODE
CARD_SEL
CARD_A
GA
TING
BUFFERS
BUFFER
CARD_B
GA
TING
I/O_A
BUFFER
I/O_B
CARD_B
CARD_A
CLK_A
Q1
Q2
CLK_B
Q3
A
B
CLOCK DIVIDERS
23
22
21
24
37
38
39
40
30
31
Q4
MULTIPLEXER
& MULTIPLEXER
In both case, the device is programmed by means of the
common logic controls pins (A0, A1, A2, A3, PGM,
PWR_ON, CARD_SEL and CS). On the other hand, the
logic status returned by the interface (STATUS pin 46) is
shared by the two channels and can be read independently
by setting CARD_SEL accordingly.
The card related signals connected on the
mC side are
multiplexed
or
independent,
depending
upon
the
MUX_MODE state as described here below.
MUX_MODE = Low
" PARALLEL MODE
When pin 44 is low, the device operates in the parallel
mode. The transfer gate Q4 and the multiplexer circuit are
disconnected and all the data will be carried out through their
respective paths. The switches Q1, Q2 and Q3 are flipped to
the B position, thus providing a direct connection from port
B control signals to CARD_B
All the CARD_A and CARD_B signals are independent
and both cards can operate simultaneously, the data
transaction can take place at the same time and processed
independently. Of course, the microcontroller must have the
right data bus available to handle this process.
However, it is not possible to change the operating mode
once the system has been started. If such a function is
needed, one must pull down the related NCN6004A power
supply, change the MUX_MODE logic level, and restart
the interface.
MUX_MODE = High
" MULTIPLEXED MODE
When pin 44 is High, the device operates in a multiplexed
mode and all the card signals are shared between CARD_A
and CARD_B, except the input clocks which are
independent at any time. The RST_B, C4_B and C8_B pins
are preferably left open at PCB level. The I/O_B pin must be
left open and cannot be connected to any external signal or
bias voltages.
The transfer gate Q4 is switched ON and, depending upon
the CARD_SEL logic level, the I/O data will be transferred
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