參數(shù)資料
型號(hào): NCN6004AFTBR2G
廠商: ON Semiconductor
文件頁(yè)數(shù): 26/40頁(yè)
文件大小: 0K
描述: IC INTERFACE SAM/SIM DUAL 48TQFP
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: PC,PDA
接口: 微控制器
電源電壓: 1.8 V ~ 5.5 V
封裝/外殼: 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 標(biāo)準(zhǔn)包裝
安裝類型: 表面貼裝
其它名稱: NCN6004AFTBR2GOSDKR
NCN6004A
http://onsemi.com
32
MUX_MODE = Low
" PARALLEL OPERATION
The bidirectional switch Q9 is OFF and the I/O signals
are routed straightforward to their appropriate outputs. The
two I/O lines can operate simultaneously, depending upon
the
mP capabilities, regardless of the CARD_SEL signal
logic level.
The pull up resistors, on the
mP side of each I/O line, can
be connected or not as defined by the EN_RPU signal.
MUX_MODE = High
" MULTIPLEXED OPERATION
The bidirectional switch Q9 is ON and the I/O_A pin is
used to handle data for CARD_A and CARD_B. The signal
is routed to the appropriate card by means of the
CARD_SEL logic signal. In this mode, the I/O_B pin 19
must be left open since the internal data signal will be
present on this pin.
Moreover, since R1 and R3 are in parallel, the pull up
resistor R1 is automatically disconnected to maintain the I/O
line impedance to 20 k
W (typical), what ever be the
EN_RPU logic level. This feature makes sure the current
flowing trough the external card is limited to 500
mA during
a low level state.
24
CRD_I/O_A
BIDIRECTIONNAL DATA TRANSFERT
42
ANLG_VCC
CRD_VCC_A
9
29
I/O_A
I/O_B
CRD_I/O_B
Q1
Q2
Q3
Q5
GND
CONTROL LOGIC
37
19
BIDIRECTIONNAL DATA TRANSFERT
Q6
Q11
Q7
Q10
CONTROL LOGIC
CARD_SEL
PWR_ON
5
44
32
CRD_VCC_B
MUX_MODE
45
EN_RPU
Q9
Q10
Q11
R1
R2
R4
Q4
Q8
& Level Shifter
CRD_VCC_A
ANLG_VCC
Figure 33. Dual Bidirectional I/O Line Level Shifter and Multiplex
R3
GND
CRD_VCC_B
ANLG_VCC
CS
7
8
6
PGM
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