CARD INTERFACE SECTION @ 2.70 < VCC
參數(shù)資料
型號(hào)： NCN6004AFTBR2G
廠商： ON Semiconductor
文件頁數(shù)： 4/40頁
文件大?。?/td> 0K
描述： IC INTERFACE SAM/SIM DUAL 48TQFP
標(biāo)準(zhǔn)包裝： 1
應(yīng)用： PC，PDA
接口： 微控制器
電源電壓： 1.8 V ~ 5.5 V
封裝/外殼： 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 標(biāo)準(zhǔn)包裝
安裝類型： 表面貼裝
其它名稱： NCN6004AFTBR2GOSDKR
NCN6004A
http://onsemi.com
12
CARD INTERFACE SECTION @ 2.70 < VCC < 5.50 V, Normal Operating Mode (25°C to +85°C ambient temperature, unless
otherwise noted) CRD_VCC_A = CRD_VCC_B = 1.8 V or 3.0 V or 5.0 V
Rating
Symbol
Pin
Min
Typ
Max
Unit
CRD_RST_A, CRD_RST_B Output Voltage
Output RST High Level @ Irst = 200
mA
Output RST Low Level @ Irst = 200
mA
CRD_RST_A, CRD_RST_B Rise and Fall time
RST Rise Time @ Cout = 30 pF
RST Fall Time @ Cout = 30 pF
VOH
VOL
trrst
tfrst
23, 38
CRD_VCC0.5
0
CRD_VCC
0.4
100
V
ns
CRD_CLK_A, CRD_CLK_B Output Clock
Output Operating Clock Card A and Card B
Output Operating Clock DC, Card A and Card B
(Input DC = 50%,
"1%)
Note: This parameter is guaranteed by design, functionality 100%
tested at production.
Output Operating Clock Rise Time SLOW Mode
Card A and Card B
Output Operating Clock Fall Time SLOW Mode
Card A and Card B
Output Operating Clock Rise Time FAST Mode
Card A and Card B
Output Operating Clock Fall Time FAST Mode
Card A and Card B
Output Clock High Level, Card A and Card B, @ Iclk = 200
mA
Output Clock Low Level, Card A and Card B, @ Iclkc = 200
mA
FclkA, FclkB
trclka, trclkb
tfclka, tfclkb
trclka, trclkb
tfclka, tfclkb
VOH
VOL
30, 31
45
CRD_VCC0.5
0
20
55
16
4
CRD_VCC
0.4
MHz
%
ns
V
CRD_IO_A, CRD_IO_B Data Transfer
Data Transfer Frequency, Card A and Card B
Data Rise Time, Card A and Card B, @ Cout = 30 pF
Data Fall Time, Card A and Card B, @ Cout = 30 pF
Data Output High Level, Card A and Card B @ Icrd_io = 20
mA
Data Output Low Level, Card A and Card B @ Icrd_io = 20
mA
FIOA, FIOB
trioa, triob
tfioa, tfiob
VOH
VOL
24, 37
CRD_VCC0.5
0
400
0.8
CRD_VCC
0.4
kHz
ms
V
CRD_IO_A and CRD_IO_B Output Voltages
I/O_A = I/O_B = 0, IOL = 500 mA
VOL
24, 37
0.40
V
CRD_C4_A, CRD_C4_B Output Voltages
Output C4 High Level @ Irst = 200
mA
Output C4 Low Level @ Irst = 200
mA
CRD_C4_A, CRD_C4_B Rise and Fall time
C4 Rise Time @ Cout = 30 pF
C4 Fall Time @ Cout = 30 pF
VOH
VOL
trc4
tfc4
22, 39
CRD_VCC0.5
0
CRD_VCC
0.4
100
V
ns
CRD_C8_A, CRD_C8_B Output Voltages
Output C4 High Level @ Irst = 200
mA
Output C4 Low Level @ Irst = 200
mA
CRD_C8_A, CRD_C8_B Rise and Fall Time
C8 Rise Time @ Cout = 30 pF
C8 RST Fall Time @ Cout = 30 pF
VOH
VOL
trc8
tfc8
21, 40
CRD_VCC0.5
0
CRD_VCC
0.4
100
V
ns
Pull Up resistance, CS = Low, PWR_ON = High
CRD_IO_A
CRD_IO_B
ROLA
ROLB
24
37
14
20
35
k
W
Card Detection Bias Pull Up Current, Card A or Card B
CRD_DET_A, CRD_DET_B
IDETA
IDETB
20
41
15
mA
Card Insertion/Extraction Negative Going Input Low Voltage
VILDETA
VILDETB
20
41
0
0.30 * Vbat
V
Card Detection Insertion/Extraction Digital Filtering Delay
CRD_DET_A
CRD_DET_B
tdcina
tdcinb
20
41
50
ms
CARD_A or CARD_B short circuit current:
CRD_IO, CRD_RST, CRD_C4, CRD_C8
CRD_CLK
(According to ISO and EMV specifications)
Ishort
Ishortclk
15
70
mA
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