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| 型號(hào)： | M-ORSO82G51BM680-DB |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1296 CLBS, 333000 GATES, PBGA680 |
| 封裝： | PLASTIC, FBGA-680 |
| 文件頁(yè)數(shù)： | 52/123頁(yè) |
| 文件大?。?/td> | 2207K |
| 代理商： | M-ORSO82G51BM680-DB |
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Lattice Semiconductor
ORCA ORSO82G5 Data Sheet
34
Scramble Sub-block
The scrambler scrambles the incoming 32-bit data using the standard SONET polynomial 1 + x
6 + x7. The scram-
bler can be disabled by a software register bit.
32:8 MUX
The MUX block is responsible for converting 32 bits of data at 77.76 MHz to 8 bits of data at 311.04 MHz. It will
contain a small elastic store for clock domain transfer between the write clock from the FPGA to the divide-by-4
clock from the SERDES output clock (XCK311). It is recommended to use the clocking scheme shown to guaran-
tee that this elastic store will not be overrun. The 32:8 MUX is also responsible for producing the divide-by-4 clock
from the SERDES output clock (XCK311) which is 311.04 MHz at a line rate of 2.488 Gbits/s.
SONET Mode Transmit Timing
Figure 19 shows the transmit clocks and the recommended clocking scheme. TCK78[A,B] should be used to
source TSYSCLK[A,B] respectively.
Figure 19. Transmit Clocking Diagram for Quad A in SONET Mode
When operating in SONET mode, the entire SONET frame is sent by the user. Optionally the TOH bytes can be
overwritten by the transmit block (AUTO_TOH) before sending to scrambler and SERDES block.
Each SONET frame is 125 s given a 155.52MHz reference clock.
The frame starts with 36 clock cycles (77.76 MHz) of TOH followed by 1044 clock cycles of SPE, followed by
36 clock cycles of TOH, 1044 cycles of SPE etc. for all 9 rows.
Figure 20. Transmit SONET Mode
xck311
LDIN[7:0]
311.04 MHz
32:8 MUX
32
FPGA
FROM OTHER LINKS
TCK78A (XCK/4)
Payload +
TOH Block
+ Scrambler
TSYSCLK[AA, AB, AC, AD]
32
DINAx_FP
DINAx
TSYSCLKxx
DINxx[31:0]
DINxx_FP
T
TTT
T
S
SS
T
SSSS
S
...
1 cycle
36 cycles TOH
1044 cycles SPE
36 cycles TOH
Start of Frame
125 s
Data
T Represents TOH
S Represents SPE
Clocks
TSYCLKxx - xx represents AA, AB, AC, AD, BA, BB, BC BD
36 cycles TOH
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