參數(shù)資料
型號(hào): LH7A404N0F000B3
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: 32-Bit System-on-Chip
封裝: LH7A404N0F000B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT1021-1.html<1<Always Pb-free,;LH7A404N0F092B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT
文件頁(yè)數(shù): 8/75頁(yè)
文件大?。?/td> 1109K
代理商: LH7A404N0F000B3
LH7A404
32-Bit System-on-Chip
8
Preliminary data sheet
NXP Semiconductors
V1
PC7
GPIO Port C7
PC7: LOW
No Change
12 mA
I/O
Y11
PD0/LCDVD8
GPIO Port D[7:0]
LCD Video Data Interface
PDx: LOW
LOW if
8-bit LCD
enabled; else
No Change
12 mA
I/O
U10
PD1/LCDVD9
W12
PD2/LCDVD10
V11
PD3/LCDVD11
W11
PD4/LCDVD12
U11
PD5/LCDVD13
V12
PD6/LCDVD14
Y12
PD7/LCDVD15
Y9
PE0/LCDVD4
GPIO Port E[3:0]
LCD Video Data Interface
PEx: Output
LOW if
8-bit LCD
enabled; else
No Change
12 mA
I/O
W10
PE1/LCDVD5
V10
PE2/LCDVD6
T9
PE3/LCDVD7
D4
PE4/SCCLKIN
GPIO Port E4
Smart Card Push-Pull Mode Clock Input
PE4: Output
No Change
12 mA
I/O
C3
PE5/SCCLKEN
GPIO Port E5
Smart Card Push-Pull Mode External Clock
Buffer Enable
PE5: Output
No Change
12 mA
I/O
B2
PE6/SCIN
GPIO Port E6
Smart Card Push-Pull Mode Data Input
PE6: Output
No Change
12 mA
I/O
A1
PE7/SCDATEN
GPIO Port E7
Smart Card Push-Pull Mode Data Out External
Buffer Enable
PE7: Output
No Change
12 mA
I/O
A9
PF0/INT0
GPIO Port F0
Interrupt 0
PF0: Input
No Change
8 mA
I/O
3
D9
PF1/INT1
GPIO Port F1
Interrupt 1
PF1: Input
No Change
8 mA
I/O
3
A8
PF2/INT2
GPIO Port F2
Interrupt 2
PF2: Input
No Change
8 mA
I/O
3
C8
PF3/INT3
GPIO Port F3
Interrupt 3
PF3: Input
No Change
8 mA
I/O
3
B8
PF4/INT4
GPIO Port F4
Interrupt 4
PF4: Input
No Change
8 mA
I/O
3
D8
PF5/INT5/
SCDETECT
GPIO Port F5
Interrupt 5
Smart Card Interface Card Detect Signal
PF5: Input
No Change
8 mA
I/O
3
A7
PF6/INT6/
PCRDY1
GPIO Port F6
Interrupt 6
Ready for Card 1 for PC Card (PCMCIA or
CompactFlash) in Single or Dual Card mode
PF6: Input
No Change
8 mA
I/O
3
E8
PF7/INT7/PCRDY2
GPIO Port F7
Interrupt 7
Ready for Card 2 for PC Card (PCMCIA or
CompactFlash) in Single or Dual Card mode
PF7: Input
No Change
8 mA
I/O
3
Y2
PG0/nPCOE
GPIO Port G0
Output Enable for PC Card (PCMCIA or
CompactFlash) in Single or Dual Card mode
LOW
No Change
8 mA
I/O
W4
PG1/nPCWE
GPIO Port G1
Write Enable for PC Card (PCMCIA or
CompactFlash) in Single or Dual Card mode
LOW
No Change
8 mA
I/O
Table 2. LH7A404 Functional Pin List (Cont’d)
LFBGA
SIGNAL
DESCRIPTION
RESET
STATE
STANDBY
STATE
OUTPUT
DRIVE
I/O NOTES
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