參數(shù)資料
型號(hào): LH7A404N0F000B3
廠商: NXP Semiconductors N.V.
元件分類(lèi): 數(shù)學(xué)處理器
英文描述: 32-Bit System-on-Chip
封裝: LH7A404N0F000B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT1021-1.html<1<Always Pb-free,;LH7A404N0F092B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT
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文件大?。?/td> 1109K
代理商: LH7A404N0F000B3
LH7A404
32-Bit System-on-Chip
48
Preliminary data sheet
NXP Semiconductors
SSP Waveforms
The Synchronous Serial Port (SSP) supports three
data frame formats:
Texas Instruments SSI
Motorola SPI
National Semiconductor MICROWIRE
Each frame format is between 4 and 16 bits in
length, depending upon the programmed data size.
Each data frame is transmitted beginning with the
Most Significant Bit (MSB) i.e. ‘big endian’. For all
three formats, the SSP serial clock is held LOW (inac-
tive) while the SSP is idle. The SSP serial clock tran-
sitions only during active transmission of data. The
SSPFRM signal marks the beginning and end of a
frame.
Figure 20 and Figure 21 show Texas Instruments
synchronous serial frame format, Figure 22 through
Figure 29 show the Motorola SPI format, and Figure 30
and Figure 31 show National Semiconductor’s MICRO-
WIRE data frame format.
For Texas Instruments SSI format, the SSPFRM pin
is pulsed prior to each frame’s transmission for one
serial clock period beginning at its rising edge. For this
frame format, both the SSP and the external slave
device drive their output data on the rising edge of the
clock and latch data from the other device on the falling
edge. See Figure 20 and Figure 21.
Figure 20. Texas Instruments Synchronous Serial Frame Format (Single Transfer)
Figure 21. Texas Instruments Synchronous Serial Frame Format (Continuous Transfer)
LH7A404-24
SSPCLK
SSPFRM
MSB
LSB
SSPTXD/
SSPRXD
4 to 16 BITS
LH7A404-25
SSPCLK
SSPFRM
SSPTXD/
SSPRXD
MSB
LSB
4 to 16 BITS
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