參數(shù)資料
型號: ISP1161BM
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 96/127頁
文件大?。?/td> 2762K
代理商: ISP1161BM
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
96 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
14.2.1
Write/Read Endpoint Buffer
This command is used to access endpoint FIFO buffers for reading or writing. First,
the buffer pointer is reset to the beginning of the buffer. Following the command, a
maximum of (M + 1) words can be written or read, with M given by (N
+
1) DIV 2, N
representing the size of the endpoint buffer. After each read/write action the buffer
pointer is automatically incremented by 2.
In DMA access the first word (the packet length) is skipped: transfers start at the
second word of the endpoint buffer. When reading, the ISP1161 DC can detect the
last word via the End of Packet (EOP) condition. When writing to a bulk/interrupt
endpoint, the endpoint buffer must be completely filled before sending the data to the
host. Exception: when a DMA transfer is stopped by an external EOT condition, the
current buffer content (full or not) is sent to the host.
Remark:
Reading data after a Write Endpoint Buffer command or writing data after a
Read Endpoint Buffer command will cause unpredictable behavior of the ISP1161
DC.
Code (Hex): 01 to 0F —
write (control IN, endpoint 1 to 14)
Code (Hex): 10, 12 to 1F —
read (control OUT, endpoint 1 to 14)
Transaction —
write/read maximum (M + 1) words (isochronous endpoint: N
1023,
bulk/interrupt endpoint: N
32)
The data in the endpoint FIFO must be organized as shown in
Table 89
. An example
of endpoint FIFO access is given
Table 90
.
Remark:
There is no protection against writing or reading past a buffer’s boundary or
against writing into an OUT buffer or reading from an IN buffer. Any of these actions
could cause an incorrect operation. Data residing in an OUT buffer are only
Table 89: Endpoint FIFO organization
Word #
0 (lower byte)
0 (upper byte)
1 (lower byte)
1 (upper byte)
M = (N + 1) DIV 2
Description
packet length (lower byte)
packet length (upper byte)
data byte 1
data byte 2
data byte N
Table 90: Example of endpoint FIFO access
A0
Phase
1
command
Bus lines
D[7:0]
D[15:8]
D[15:0]
D[15:0]
D[15:0]
Word #
-
-
0
1
2
Description
command code (00H to 1FH)
ignored
packet length
data word 1 (data byte 2, data byte 1)
data word 2 (data byte 4, data byte 3)
0
0
0
data
data
data
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