參數(shù)資料
型號: ISP1161BM
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 102/127頁
文件大小: 2762K
代理商: ISP1161BM
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
102 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
14.3.4
Read Frame Number
This command returns the frame number of the last successfully received SOF. It is
followed by reading one word from the Frame Number Register, containing the frame
number. The Frame Number Register is shown in
Table 102
.
Remark:
After a bus reset, the value of the frame Number Register is undefined.
Code (Hex): B4 —
read frame number
Transaction —
read 1 word
[1]
Reset value undefined after a bus reset.
14.3.5
Read Chip ID
This command reads the chip identification code and hardware version number. The
firmware must check this information to determine the supported functions and
features. This command accesses the Chip ID Register, which is shown in
Table 104
.
Code (Hex): B5 —
read chip ID
Transaction —
read 1 word
Table 102:Frame Number Register: bit allocation
Bit
15
Symbol
reserved
Reset
[1]
0
Access
R
Bit
7
Symbol
Reset
[1]
0
Access
R
14
13
12
11
10
9
8
reserved
0
R
6
reserved
0
R
5
reserved
0
R
4
reserved
0
R
3
SOFRH[2:0]
0
R
1
0
R
2
0
R
0
SOFRL[7:0]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
Table 103:Example of Frame Number Register access
A0
Phase
Bus lines
1
command
D[7:0]
D[15:8]
0
data
D[15:0]
Word #
-
-
0
Description
command code (B4H)
ignored
frame number
Table 104:Chip ID Register: bit allocation
Bit
15
Symbol
Reset
0
Access
R
Bit
7
Symbol
Reset
Access
R
14
13
12
11
10
9
8
CHIPIDH[7:0]
0
R
4
CHIPIDL[7:0]
X0H
R
1
R
6
1
R
5
0
R
3
0
R
2
0
R
1
1
R
0
R
R
R
R
R
R
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