- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360998 > ISP1161BM (NXP SEMICONDUCTORS) Full-speed Universal Serial Bus single-chip host and device controller PDF資料下載
參數(shù)資料
| 型號(hào)： | ISP1161BM |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus single-chip host and device controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件頁數(shù)： | 27/127頁 |
| 文件大?。?/td> | 2762K |
| 代理商： | ISP1161BM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當(dāng)前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
27 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
9.4 HC’s internal FIFO buffer RAM structure
9.4.1
Partitions
According to the Universal Serial Bus Specification Rev 1.1 there are four types of
USB data transfers: Control, Bulk, Interrupt and Isochronous.
The HC’s internal FIFO buffer RAM is of a physical size of 4 kbytes. This internal
FIFO buffer RAM is used for transferring data between the microprocessor and USB
peripheral devices. This on-chip buffer RAM can be partitioned into two areas:
Acknowledged Transfer List (ATL) buffer and Isochronous (ISO)Transfer List (ITL)
buffer. The ITL buffer is a Ping-pong structured FIFO buffer RAM that is used to keep
the payload data and their PTD header for Isochronous transfers. The ATL buffer is a
non Ping-pong structured FIFO buffer RAM that is used for the other three types of
transfers.
For the ITL buffer, it can be further partitioned into ITL0 and ITL1 for the Ping-Pong
structure. The ITL0 buffer and ITL1 buffer always have the same size. The
microprocessor can put ISO data into either the ITL0 buffer or the ITL1 buffer. When
the microprocessor accesses an ITL buffer, the HC can take over another ITL buffer
at the same time. This architecture can improve the ISO transfer performance.
The Host Controller Driver can assign the logical size for ATL buffer and ITL buffers at
any time, but normally at initialization after power-on reset, by setting the
HcATLBufferLength register (2BH - Read, ABH - Write) and HcITLBufferLength
register (2AH - Read, AAH - Write), respectively. However, the total length (ATL buffer
+ ITL buffer) should not exceed 4 kbytes, the maximum RAM size.
Figure 26
shows
the partitions of the internal FIFO buffer RAM. When assigning buffer RAM sizes,
follow this formula:
ATL buffer length + 2
×
(ITL buffer size)
≤
1000H (that is, 4 kbytes)
where: ITL buffer size = ITL0 buffer length = ITL1 buffer length
The following assignments are examples of legal uses of the internal FIFO buffer
RAM:
ATL buffer length = 800H, ITL buffer length = 400H.
This is the maximum use of the internal FIFO buffer RAM.
TotalBytes[9:0]
R
Specifies the total number of bytes to be transferred with this data structure. For Bulk and
Control only, this can be greater than MaximumPacketSize.
00
SETUP
01
OUT
10
IN
11
reserved
The format of this data structure. If this is a Control, Bulk or Interrupt endpoint, then
Format = 0. If this is an Isochronous endpoint, then Format = 1.
The is the USB address of the function containing the endpoint that this PTD refers to.
DirectionPID[1:0]
R
Format
R
FunctionAddress[6:0]
R
Table 5:
Symbol
Philips Transfer Descriptor (PTD): bit description
…continued
Access
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISP1181ABS | INDUCTOR 1.0NH +-.3NH FIXED SMD |
| ISP1181A | Full-speed Universal Serial Bus peripheral controller |
| ISP1181ADGG | Full-speed Universal Serial Bus peripheral controller |
| ISP1181B | Full-speed Universal Serial Bus peripheral controller |
| ISP1181BBS | Full-speed Universal Serial Bus peripheral controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1181 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus interface device |
| ISP1181A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller |
| ISP1181ABS,518 | 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1181ABS,551 | 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。