參數(shù)資料
型號(hào): HY27US08121B-TPIS
廠商: HYNIX SEMICONDUCTOR INC
元件分類: PROM
英文描述: 64M X 8 FLASH 3.3V PROM, 18 ns, PDSO48
封裝: 12 X 20 MM, 1.20 MM HEIGHT, LEAD FREE, TSOP1-48
文件頁(yè)數(shù): 7/40頁(yè)
文件大?。?/td> 360K
代理商: HY27US08121B-TPIS
Rev 0.5 / Jul. 2007
15
HY27US(08/16)12(1/2)B Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
4. OTHER FEATURES
4.1 Data Protection for Power on/off Sequence
The device is designed to offer protection from any involuntary program/erase during power-transitions. An internal
voltage detector disables all functions whenever Vcc is below about 2.0V(3.0V device). WP pin provides hardware pro-
tection and is recommended to be kept at VIL during power-up and power-down. A recovery time of minimum 10us is
required before internal circuit gets ready for any command sequences as shown in Figure 22. The two-step command
sequence for program/erase provides additional software protection.
4.2 Ready/Busy.
The device has a Ready/Busy output that provides method of indicating the completion of a page program, erase,
copy-back and random read completion. The R/B pin is normally high and goes to low when the device is busy (after a
reset, read, program, erase operation). It returns to high when the internal controller has finished the operation. The
pin is an open-drain driver thereby allowing two or more R/B outputs to be Or-tied.
Because pull-up resistor value is related to tr(R/B) and current drain during busy (Ibusy), an appropriate value can be
obtained with the following reference chart in Figure 23. Its value can be determined by the following guidance.
相關(guān)PDF資料
PDF描述
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