參數(shù)資料
型號： HY27SA081G1M-VPEB
廠商： HYNIX SEMICONDUCTOR INC
元件分類： PROM
英文描述： 128M X 8 FLASH 1.8V PROM, 12000 ns, PDSO48
封裝： 12 X 17 MM, 0.70 MM HEIGHT, LEAD FREE, WSOP1-48
文件頁數(shù)： 10/45頁
文件大?。?/td> 675K
代理商： HY27SA081G1M-VPEB
Rev 0.3 / May. 2004
18
Preliminary
HY27UA(08/16)1G1M Series
HY27SA(08/16)1G1M Series
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Copy Back Program
The Copy Back Program operation is used to copy the data stored in one page and reprogram it in another page.
The Copy Back Program operation does not require external memory and so the operation is faster and more efficient
because the reading and loading cycles are not required. The operation is particularly useful when a portion of a block
is updated and the rest of the block needs to be copied to the newly assigned block.
If the Copy Back Program operation fails an error is signalled in the Status Register. However as the standard external
ECC cannot be used with the Copy Back operation bit error due to charge loss cannot be detected. For this reason it is
recommended to limit the number of Copy Back operations on the same data and/or to improve the performance of
the ECC.
The Copy Back Program operation requires three steps:
- 1. The source page must be read using the Read A command (one bus write cycle to setup the command and then
4 bus write cycles to input the source page address). This operation copies all 264 Words/ 528 Bytes from the page
into the Page Buffer.
- 2. When the device returns to the ready state (Ready/Busy High), the second bus write cycle of the command is
given with the 4 bus cycles to input the target page address.
A25 & A26 must be the same for the Source and Target
Pages.
- 3. Then the confirm command is issued to start the P/E/R Controller.
After a Copy Back Program operation, a partial page program is not allowed in the target page until the block has been
erased.
See Figure 15 for an example of the Copy Back operation.
Cache Program
The Cache Program operation is used to improve the programming throughput by programming data using the Cache
Register. The Cache Program operation can only be used within one block. The Cache Register allows new data to be
input while the previous data that was transferred to the Page Buffer is programmed into the memory array.
Before starting a Cache Program operation a Pointer operation is necessary to point to the area to be programmed.
Only the 00h or 50h Pointer operations are valid for the Cache Program operation. Refer to the Pointer Operations sec-
tion and Figure 9 for details. Each Cache Program operation consists of five steps (refer to Figure 16):
1. First of all the program setup command is issued (one bus cycle to issue the program setup command then four bus
Figure 15. Copy Back Operation
Source
Address Inputs
I/O
00h
Copy Back
Code
Target
Address Inputs
8Ah
10h
70h
Read
Code
Read Status Register
SR0
Busy
tBLBH2
(Program Busy time)
tBLBH1
(Read Busy time)
RB
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