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參數(shù)資料
| 型號(hào)： | HDMP-0452 |
| 英文描述： | Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrated Loops |
| 中文描述： | 四端口旁路電路與光纖通道仲裁環(huán)路的CDR |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 273K |
| 代理商： | HDMP-0452 |
4
Figure 2. HDMP-0452 package layout and marking, top view.
44
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
43 42 41 40 39 38 37 36 35 34
12 13 14 15 16 17 18 19 20 21 22
GND
GND
GND
GND
GND
V
CC
A
TO_NODE[4]+
Agilent
HDMP-0452
G
S
C
G
V
CC
HS[4]
FM_NODE[4]+
V
CC
HS[0]
TO_NODE[0]–
TO_NODE[4]–
FM_NODE[4]–
TO_NODE[0]+
V
CC
FM_NODE [1]–
FM_NODE [1]+
V
CC
HS[1]
TO_NODE [1]–
TO_NODE [1]+
FM_NODE [0]–
FM_NODE [0]+
R
B
B
B
B
B
V
C
C
T
T
F
F
T
T
F
F
V
C
H
V
C
H
nnnn-nnn Rz.zz
S YYWW
nnnn-nnn= WAFER LOT – BUILD NUMBER
Rz.zz= DIE REVISION
S= SUPPLIER CODE
YYWW= DATE CODE (YY= YEAR, WW= WORK WEEK)
COUNTRY= COUNTRY OF MANUFACTURE
(ON BACK SIDE)
I/O Type Definitions
I/O Type
I-LVTTL
O-LVTTL
HS_OUT
HS_IN
C
S
Definition
LVTTL Input
LVTTL Output
High-Speed Output, LVPECL Compatible
High-Speed Input
External Circuit Node
Power Supply or Ground
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