參數(shù)資料
型號(hào): GS8170S72
廠商: GSI TECHNOLOGY
英文描述: 16Mb(256K x 72Bit)Synchronous SRAM(16M位(256K x 72位)同步靜態(tài)RAM)
中文描述: 16Mb的(256 × 72Bit)同步SRAM(1,600位(256 × 72位)同步靜態(tài)內(nèi)存)
文件頁數(shù): 7/38頁
文件大?。?/td> 934K
代理商: GS8170S72
Rev: 1.01 11/2000
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
7/38
2000, Giga Semiconductor, Inc.
A
Advanced Information
GS8170S18/36/72B-333/300/275/250
Common I/O Sigma RAM Family Mode Comparison—EW vs. LW vs. DLW
Early Write---Flow Through Read
The character of the applications for fast synchronous SRAMs in networking systems are extremely diverse.
Σ
RAMs have been
developed to address the diverse needs of the networking market in a manner that can be supported with a unified development and
manufacturing infrastructure.
Σ
RAMs address each of the bus protocol options commonly found in networking systems. This
allows the
Σ
RAM to find application in radical shrinks and speed-ups of existing networking chip sets that were designed for use
with older SRAMs, like the Pipelined Synchronous Burst SRAM, as well as with new chip sets and ASIC’s that employ the Echo
Clocks and realize the full potential of the
Σ
RAMs.
Late Write---Flow Through Read
DQ
Early Write---Pipelined Read
Late Write---Pipelined Read
Double Late Write---Pipelined Read
CQ
QA
DB
QC
DD
D
E
F
W
R
W
Control
R
W
R
Address
A
B
C
DF
CK
CQ
W
Control
X
X
W
CK
QD
Address
DF
QE
A
QA
DC
QA
R
D
DD
R
DB
QA
QC
DD
D
E
F
W
R
W
Control
R
W
R
CK
Address
A
B
CQ
F
A
Address
B
QA
C
D
E
W
DF
QD
DC
W
E
Control
DQ
CK
Address
R
X
R
X
C
F
Control
R
X
X
W
R
R
B
C
QE
DQ
CK
QE
A
B
C
D
E
F
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