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| 型號(hào)： | DS32512N+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 44/130頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU DS3/E3/STS-1 12P 484-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 30 |
| 類(lèi)型： | 線路接口裝置（LIU） |
| 規(guī)程： | DS3 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 484-BGA |
| 供應(yīng)商設(shè)備封裝： | 484-BGA（23x23） |
| 包裝： | 管件 |
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DS32506/DS32508/DS32512
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NAME
TYPE
FUNCTION
ITRE
I
Internal Termination Resistance Enable (Tx and Rx) (All Ports). This bit indicates when the
internal termination is enabled. See Section 8.2.8.
0 = Disabled. The transmitters and receivers are terminated externally.
1 = Enabled. The transmitters and receivers are terminated internally.
RBIN
Ipd
Receive Binary Interface Control (All Ports). See Section 8.3.6.
encoder is disabled.
1 = Receiver framer interface is binary on the
RDAT pin, and the B3ZS/HDB3 encoder is
enabled.
RCLKI
Ipd
Receive Clock Invert Control (All Ports). See Section 8.3.6.3.
0 = RPOS/
1 = RPOS/
RLOSn
O
Receive Loss-of-Signal Status (Port n). This pin is asserted upon detection of 192
consecutive zeros in the receive data stream. It is deasserted when there are no excessive
zero occurrences over a span of 192 clock periods. An excessive zero occurrence is defined as
three or more consecutive zeros in DS3 and STS-1 modes or four or more zeros in E3 mode.
See Section 8.3.5.
RMONn
Ipd
Receive Monitor Preamp Control (Port n). This pin determines whether or not the receiver
preamp is enabled in port n to provide flat gain to the incoming signal before the AGC/equalizer
block processes it. This feature should be enabled when the device is being used to monitor
signals that have been resistively attenuated by a monitor jack. See Section 8.3.2 for more
information.
0 = Disable the monitor preamp
1 = Enable the monitor preamp
RPD
Ipd
Receive Power-Down (All Ports). See Section 8.3.7.
0 = Enable all receivers
1 = Power down all receivers (RXPn/RXNn high impedance. RCLKn, RPOSn/RDATn, and
JAD[1:0]
Ipd
Jitter Attenuator Depth (All Ports). These pins are ignored when a microprocessor interface
is enabled (IFSEL
≠ 000). See Section 8.4.
00 = 16 bits
01 = 32 bits
10 = 64 bits
11 = 128 bits
JAS[1:0]
Ipd
Jitter Attenuator Select (All Ports). These pins select the location of the jitter attenuator.
These pins are ignored when a microprocessor interface is enabled (IFSEL
≠ 000). See Section
00 = Disabled
01 = Receive path
1X = Transmit path
LBn[1:0]
Ipd
Loopback Control (Port n). When only the hardware interface is enabled (IFSEL = 000 and
00 = No loopback
01 = Diagnostic loopback (DLB)
10 = Line loopback (LLB)
11 = (LBS = 0) Line loopback (LLB) and diagnostic loopback (DLB) simultaneously
11 = (LBS = 1) Analog loopback (ALB)
LBS
Ipd
Loopback Select (All Ports). This pin specifies how the device interprets the LBn[1:0] bits.
This pin is ignored when a microprocessor interface is enabled (IFSEL
≠ 000). See Section 8.6.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS32512N# | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS32512N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS32512NA2 | 制造商:Maxim Integrated Products 功能描述:DS32512 X12 DS3/E3 LIU REVA2 IND - Rail/Tube |
| DS32512NW | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS32512W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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