參數(shù)資料
型號: DS32512N+
廠商: Maxim Integrated Products
文件頁數(shù): 41/130頁
文件大?。?/td> 0K
描述: IC LIU DS3/E3/STS-1 12P 484-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 30
類型: 線路接口裝置(LIU)
規(guī)程: DS3
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 484-BGA
供應(yīng)商設(shè)備封裝: 484-BGA(23x23)
包裝: 管件
DS32506/DS32508/DS32512
18 of 130
Table 7-4. Global Pin Descriptions
NAME
TYPE
FUNCTION
IFSEL[2:0]
I
Microprocessor Interface Select. When no microprocessor interface is selected, all
microprocessor interface inputs are ignored and internally pulled low, and all microprocessor
interface outputs are put in a high-impedance state. See Section 6 for details.
000 = no microprocessor interface (must set HW = 1 and use hardware interface)
001 = reserved
010 = SPI serial interface, address and data MSB first
011 = SPI serial interface, address and data LSB first
100 = 8-bit parallel interface, Intel style (
CS, RD, WR control signals)
101 = 8-bit parallel interface, Motorola style (
CS, R/W, DS control signals)
110 = 16-bit parallel interface, Intel style (
CS, RD, WR control signals)
111 = 16- bit parallel interface, Motorola style (
CS, R/W, DS control signals)
HW
Ipd
Hardware Interface Enable. When the hardware interface pins are disabled, all hardware
control inputs are ignored and internally pulled low, and all hardware status outputs are put in a
high impedance state. See Section 6 for details.
0 = Hardware interface pins disabled
1 = Hardware interface pins enabled
TEST
I
Factory Test Enable (Active Low). This pin enables the internal scan test mode when low.
For normal operation tie high. This is an asynchronous input.
HIZ
I
High-Impedance Test Enable (Active Low). This signal is used to enable testing. When this
signal is low while
JTRST is low, all the digital output and bidirectional pins are placed in the
high-impedance state. For normal operation this signal is high. This is an asynchronous input.
RST
Ipu
Reset (Active Low, Open Drain). When this global asynchronous reset is pulled low, all
internal circuitry is reset and all internal registers are forced to their default values. The device
is held in reset as long as
RST is low. RST should be held low for at least two reference clock
cycles. See Section 8.11.
RESREF
Oa
Reference Resistor. This pin is tied to VSS through a 10k
Ω ±1% resistor. This accurate
resistor is used to calibrate on-chip resistor values including internal transmit and receive
termination resistors.
相關(guān)PDF資料
PDF描述
DS3254N+ IC LIU DS3/E3/STS-1 144-CSBGA
DS33M33N+ IC MAPPER ETHERNET 256CSBGA
DS33R11+CJ2 IC ETH TXRX T1/E1/J1 256-BGA
DS33R41+ IC TXRX ETHERNET MAP 400-BGA
DS33W11DK+ IC MAPPING ETHERNET 256-CSBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS32512N# 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS32512N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS32512NA2 制造商:Maxim Integrated Products 功能描述:DS32512 X12 DS3/E3 LIU REVA2 IND - Rail/Tube
DS32512NW 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS32512W 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray