參數(shù)資料
型號: DS3131
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Telecom IC:Other
英文描述: SPECIALTY TELECOM CIRCUIT, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù): 66/174頁
文件大?。?/td> 1261K
代理商: DS3131
DS3131
158 of 174
Shift-IR. In this state, the shift register in the instruction register is connected between JTDI and JTDO
and shifts data one stage for every rising edge of JTCLK toward the serial output. The parallel registers
as well as all test registers remain at their previous states. A rising edge on JTCLK with JTMS high
moves the controller to the Exit1-IR state. A rising edge on JTCLK with JTMS low keeps the controller
in the Shift-IR state while moving data one stage through the instruction shift register.
Exit1-IR. A rising edge on JTCLK with JTMS low puts the controller in the Pause-IR state. If JTMS is
high on the rising edge of JTCLK, the controller enters the Update-IR state and terminates the scanning
process.
Pause-IR. Shifting of the instruction register is halted temporarily. With JTMS high, a rising edge on
JTCLK puts the controller in the Exit2-IR state. The controller remains in the Pause-IR state if JTMS is
low during a rising edge on JTCLK.
Exit2-IR. A rising edge on JTCLK with JTMS high puts the controller in the Update-IR state. The
controller loops back to the Shift-IR state if JTMS is low during a rising edge of JTCLK in this state.
Update-IR. The instruction shifted into the instruction shift register is latched into the parallel output on
the falling edge of JTCLK as the controller enters this state. Once latched, this instruction becomes the
current instruction. A rising edge on JTCLK with JTMS low puts the controller in the Run-Test-Idle
state. With JTMS high, the controller enters the Select-DR-Scan state.
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