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參數(shù)資料
| 型號(hào)： | DS3131 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Telecom IC:Other |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 65/174頁 |
| 文件大?。?/td> | 1261K |
| 代理商： | DS3131 |
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DS3131
157 of 174
Test-Logic-Reset. The TAP controller is in the Test-Logic-Reset state upon DS3131 power-up. The
instruction register contains the IDCODE instruction. All system logic on the DS3131 operates normally.
Run-Test-Idle. Run-Test-Idle is used between scan operations or during specific tests. The instruction
and test registers remain idle.
Select-DR-Scan
. All test registers retain their previous state. With JTMS low, a rising edge of JTCLK
moves the controller into the Capture-DR state and initiates a scan sequence. JTMS high moves the
controller to the Select-IR-SCAN state.
Capture-DR
. Data can be parallel loaded into the test data registers selected by the current instruction.
If the instruction does not call for a parallel load or the selected register does not allow parallel loads, the
test register remains at its current value. On the rising edge of JTCLK, the controller goes to the Shift-
DR state if JTMS is low or it goes to the Exit1-DR state if JTMS is high.
Shift-DR
. The test data register selected by the current instruction is connected between JTDI and JTDO
and shifts data one stage toward its serial output on each rising edge of JTCLK. If a test register selected
by the current instruction is not placed in the serial path, it maintains its previous state.
Exit1-DR. While in this state, a rising edge on JTCLK with JTMS high puts the controller in the
Update-DR state, which terminates the scanning process. A rising edge on JTCLK with JTMS low puts
the controller in the Pause-DR state.
Pause-DR. Shifting of the test registers is halted while in this state. All test registers selected by the
current instruction retain their previous states. The controller remains in this state while JTMS is low. A
rising edge on JTCLK with JTMS high puts the controller in the Exit2-DR state.
Exit2-DR. While in this state, a rising edge on JTCLK with JTMS high puts the controller in the
Update-DR state and terminates the scanning process. A rising edge on JTCLK with JTMS low enters
the Shift-DR state.
Update-DR. A falling edge on JTCLK while in the Update-DR state latches the data from the shift
register path of the test registers into the data output latches. This prevents changes at the parallel output
because of changes in the shift register. A rising edge on JTCLK with JTMS low puts the controller in
the Run-Test-Idle state. With JTMS high, the controller enters the Select-DR-Scan state.
Select-IR-Scan. All test registers retain their previous states. The instruction register remains
unchanged during this state. With JTMS low, a rising edge on JTCLK moves the controller into the
Capture-IR state and initiates a scan sequence for the instruction register. JTMS high during a rising edge
on JTCLK puts the controller back into the Test-Logic-Reset state.
Capture-IR. The Capture-IR state is used to load the shift register in the instruction register with a fixed
value. This value is loaded on the rising edge of JTCLK. If JTMS is high on the rising edge of JTCLK,
the controller enters the Exit1-IR state. If JTMS is low on the rising edge of JTCLK, the controller enters
the Shift-IR state.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3131DK | 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS3134 | 功能描述:IC CTRLR HDLC CHATEAU 256-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號(hào)調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
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