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| 型號(hào)： | DS3131 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Telecom IC:Other |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁(yè)數(shù)： | 164/174頁(yè) |
| 文件大?。?/td> | 1261K |
| 代理商： | DS3131 |
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DS3131
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The DMA uses a set of descriptors to know where to store the incoming HDLC packet data and where to
obtain HDLC packet data ready to be transmitted. The descriptors are fixed-size messages that are
handed back and forth from the DMA to the host. Since this descriptor transfer uses bus cycles, the
DMA has been structured to minimize the number of transfers required. For example, on the receive
side, the DMA obtains descriptors from the host to know where in the 32-bit address space to place the
incoming packet data. These descriptors are known as free-queue descriptors. When the DMA reads
these descriptors off the PCI bus, they provide all the information the DMA needs to store the incoming
data. Unlike other existing scatter/gather DMA architectures, the DS3131 DMA does not need additional
bus cycles to determine where to place the data. Other DMA architectures tend to use pointers, which
require them to go back onto the bus to obtain more information and hence use more bus cycles.
Another technique the DMA uses to maximize bus utilization is burst reading and writing the
descriptors. The BoSS can be enabled to read and write the descriptors in bursts of 8 or 16 instead of one
at a time. Since there is fixed overhead associated with each bus transaction, the ability to burst read and
write descriptors allows the device to share the bus overhead among 8 or 16 descriptor transactions,
reducinga the total number of bus cycles needed.
The DMA can also burst up to 256 dwords (1024 Bytes) onto the PCI bus. This helps minimize bus
cycles by allowing the device to burst large amounts of data in a smaller number of bus transactions.
This reduces bus cycles by reducing the amount of fixed overhead placed on the bus.
When the local bus is enabled, ports 28 to 39 (HDLC channels 29 to 40) are disabled to make room for
the signals needed by the local bus. The local bus block has two modes of operation. It can be used as a
bridge from the PCI bus, in which case it is a bus master. It can also be used as a configuration bus, in
which case it is a bus slave. The bridge mode allows the host on the PCI bus to access the local bus. The
DS3131 maps data from the PCI bus to the local bus. In the configuration mode, the local bus is used
only to control and monitor the DS3131, while the HDLC packet data is still transferred to the host
through the PCI bus.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3134 | DATACOM, FRAMER, PBGA256 |
| DS3150QN | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150Q | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150TN | DATACOM, PCM TRANSCEIVER, PDIP48 |
| DS3150T | DATACOM, PCM TRANSCEIVER, PQFP48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3131DK | 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS3134 | 功能描述:IC CTRLR HDLC CHATEAU 256-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號(hào)調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
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