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參數(shù)資料
| 型號： | DS3131 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Telecom IC:Other |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 172/174頁 |
| 文件大小： | 1261K |
| 代理商： | DS3131 |
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DS3131
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9.3 Transmit Side
9.3.1 Overview
The transmit DMA uses a scatter-gather technique to read packet data from main memory. The host
keeps track of and decides from where (and when) the DMA should grab the outgoing packet data. A set
of descriptors that get handed back and forth between the host and the DMA tells the DMA where to
obtain the packet data, and the DMA can tell the host when the data has been transmitted.
The transmit DMA operation has three main areas, as shown in Figure 9-10, Figure 9-11, and Table 9-G.
transmitted. Associated with each pending-queue descriptor is a data buffer that contains the actual data
payload of the HDLC packet. The data buffers can be between 1 and 8191 Bytes in length (inclusive). If
an outgoing packet requires more memory than a data buffer contains, the host can link the data buffers
to handle packets of any size.
The done-queue descriptors contain information that the DMA wishes to pass to the host. The DMA
writes to the done queue when it has completed transmitting either a complete packet or data buffer (see
below for the discussion on the DMA update to the done queue). Through the done-queue descriptors,
the DMA informs the host about the status of the outgoing packet data. If an error occurs in the
transmission, the done queue can be used by the host to recover the packet data that did not get
transmitted and the host can then re-queue the packets for transmission.
If enabled, the DMA can burst read the pending-queue descriptors and burst write the done-queue
descriptors. This helps minimize PCI bus accesses, freeing the PCI bus up to do more time-critical
functions. See Sections 9.3.3 and 9.3.4 for more details on this feature.
Table 9-G. Transmit DMA Main Operational Areas
DESCRIPTORS
FUNCTION
SECTION
Packet
A dedicated area of memory that describes the location and attributes of the
packet data.
9.3.2
Pending Queue
A dedicated area of memory that the host writes to inform the DMA that
packet data is queued and ready for transmission.
9.3.3
Done Queue
A dedicated area of memory that the DMA writes to inform the host that the
packet data has been transmitted.
9.3.4
Host Linking of Data Buffers
As previously mentioned, the data buffers are limited to a length of 8191 Bytes. If an outgoing packet
requires more memory space than the available data buffer contains, the host can link multiple data
buffers together to handle a packet length of any size. The host does this through the end-of-frame (EOF)
bit in the packet descriptor. Each data buffer has a one-to-one association with a packet descriptor. If the
host wants to link multiple data buffers together, the EOF bit is set to 0 in all but the last data buffer.
Figure 9-10 shows an example for HDLC channel 5 where the host has linked three data buffers
together. The transmit DMA knows where to find the next data buffer when the EOF bit is set to 0
through the next descriptor pointer field.
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| DS3134 | DATACOM, FRAMER, PBGA256 |
| DS3150QN | DATACOM, PCM TRANSCEIVER, PQCC28 |
| DS3150Q | DATACOM, PCM TRANSCEIVER, PQCC28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3131DK | 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS3134 | 功能描述:IC CTRLR HDLC CHATEAU 256-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
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