參數(shù)資料
型號: AX88196BLF
廠商: ASIX Electronics Corporation
英文描述: Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller with MII Interface
中文描述: 低引腳數(shù)不符合信息產(chǎn)業(yè)部的PCI接口16位產(chǎn)品個10/100M快速以太網(wǎng)控制器
文件頁數(shù): 14/86頁
文件大?。?/td> 551K
代理商: AX88196BLF
ASIX ELECTRONICS CORPORATION
14
AX88196BLF
If address Y is found to hash to the value 32 (20H), then FB32 (ref. 4.1.2) in MAR2 should be initialized to ``1''. This
will cause the AX88196B to accept any multicast packet with the address Y.
Although the hashing algorithm does not guarantee perfect filtering of multicast address, it will perfectly filter up to
64 logical address filters if these addresses are chosen to map into unique locations in the multicast filter.
Note:
The first bit of received packet sequence is 1’s stands by Multicast Address.
4.1.3 Broadcast Address Match Filter
The Broadcast check logic compares the Destination Address Field (first 6 bytes of the received packet) to all 1’s,
which is the values are “FF FF FF FF FF FF FF” in Hex format. If any bit of the six bytes does not equal to 1’s, the
Protocol Control Logic rejects the packet.
4.1.4 VLAN Match Filter
AX88196B compares the thirteenth and fourteenth bytes of receive frames. If not match with VLAN_ID1,
VLAN_ID_0 (offset 1dh, 1ch) then reject current frame. The VLAN filter will always accept VLAN_ID is zero of
receive frames due to it is 802.1q (for priority purpose) frames. The maximum length of the good packet is thus
change from 1518 bytes to 1522 bytes.
32-bit CRC Generator
Latch
1 of 64-bit decoder
Filter bit array
X=31 to X=26
Clock
Selected bit
0 = reject, 1= accept
7 Bytes
Preamble
SFD
1 Byte
6 Bytes
Destination
Address
6 Bytes
Source
Address
2 B
46-1500 Bytes
4 Bytes
L/T
Data
Pad
FCS
Layer 2
Frame (64-1518 Bytes)
VLAN (64-1522 Bytes)
8100
TCI
2 B
2 B
VLAN ID
Priority
CFI
802.1Q
VLAN tagging
3 bits
12 bits
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