參數(shù)資料
型號(hào)： ADV7321KSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 54/88頁(yè)
文件大小： 0K
描述： IC VID ENC 6-12BIT DAC'S 64LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 視頻編碼器
應(yīng)用： EVD，DVD，SD/PS/HDTV
電壓 - 電源，模擬： 2.5V
電壓 - 電源，數(shù)字： 2.5V
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
ADV7320/ADV7321
Rev. A | Page 58 of 88
BLOCK SIZE CONTROL
BORDER AREA
BLOCK OFFSET
CORING GAIN DATA
CORING GAIN BORDER
GAIN
DNR CONTROL
FILTER
OUTPUT
> THRESHOLD?
INPUT FILTER
BLOCK
FILTER OUTPUT
< THRESHOLD
DNR OUT
+
MAIN SIGNAL PATH
ADD SIGNAL
ABOVE
THRESHOLD
RANGE FROM
ORIGINAL SIGNAL
DNR
SHARPNESS
MODE
NOISE
SIGNAL PATH
Y DATA
INPUT
BLOCK SIZE CONTROL
BORDER AREA
BLOCK OFFSET
CORING GAIN DATA
CORING GAIN BORDER
GAIN
DNR CONTROL
FILTER
OUTPUT
< THRESHOLD?
INPUT FILTER
BLOCK
FILTER OUTPUT
> THRESHOLD
DNR OUT
MAIN SIGNAL PATH
SUBTRACT SIGNAL
IN THRESHOLD
RANGE FROM
ORIGINAL SIGNAL
DNR MODE
NOISE
SIGNAL PATH
Y DATA
INPUT
–
+
05067-078
Figure 78. DNR Block Diagram
CORING GAIN BORDER
[Address 0x63, Bits 3 to 0]
These four bits are assigned to the gain factor applied to border
areas. In DNR mode, the range of gain values is 0 to 1 in incre-
ments of 1/8. This factor is applied to the DNR filter output,
which lies below the set threshold range. The result is then
subtracted from the original signal.
In DNR sharpness mode, the range of gain values is 0 to 0.5 in
increments of 1/16. This factor is applied to the DNR filter
output, which lies above the threshold range. The result is
added to the original signal.
CORING GAIN DATA
[Address 0x63, Bits 7 to 4]
These four bits are assigned to the gain factor applied to the luma
data inside the MPEG pixel block. In DNR mode, the range of
gain values is 0 to 1 in increments of 1/8. This factor is applied
to the DNR filter output, which lies below the set threshold
range. The result is then subtracted from the original signal.
In DNR sharpness mode, the range of gain values is 0 to 0.5 in
increments of 1/16. This factor is applied to the DNR filter
output, which lies above the threshold range. The result is
added to the original signal.
O XXXXXX O O XXXX XXO
DNR27 – DNR24 = 0x01
OFFSET CAUSED
BY VARIATIONS IN
INPUT TIMING
APPLY BORDER
CORING GAIN
APPLY DATA
CORING GAIN
05067-079
Figure 79. DNR Offset Control
DNR THRESHOLD
[Address 0x64, Bits 5 to 0]
These six bits are used to define the threshold value in the range
of 0 to 63. The range is an absolute value.
BORDER AREA
[Address 0x64, Bit 6]
When this bit is set to Logic 1, the block transition area can be
defined to consist of four pixels. If this bit is set to Logic 0, the
border transition area consists of two pixels, where one pixel
refers to two clock cycles at 27 MHz.
720
× 485 PIXELS
(NTSC)
8
× 8 PIXEL BLOCK
2-PIXEL
BORDER
DATA
8
× 8 PIXEL BLOCK
05067-080
Figure 80. DNR Border Area
BLOCK SIZE CONTROL
[Address 0x64, Bit 7]
This bit is used to select the size of the data blocks to be
processed. Setting the block size control function to Logic 1
defines a 16-pixel × 16-pixel data block, and Logic 0 defines an
8-pixel × 8-pixel data block, where one pixel refers to two clock
cycles at 27 MHz.
DNR INPUT SELECT CONTROL
[Address 0x65, Bits 2 to 0]
Three bits are assigned to select the filter, which is applied to
the incoming Y data. The signal that lies in the pass band of
the selected filter is DNR processed. Figure 81 shows the filter
responses selectable with this control.
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