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參數(shù)資料
| 型號： | ADV7321KSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 46/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VID ENC 6-12BIT DAC'S 64LQFP |
| 標準包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應用： | EVD，DVD，SD/PS/HDTV |
| 電壓 - 電源，模擬： | 2.5V |
| 電壓 - 電源，數(shù)字： | 2.5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
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ADV7320/ADV7321
Rev. A | Page 50 of 88
This is reflected in the preprogrammed values for GY = 0x13B,
GU = 0x3B, GV = 0x93, BU = 0x248, and RV = 0x1F0.
If the RGB matrix is enabled and another input standard (such
as SD or PS) is used, the scale values for GY, GU, GV, BU, and
RV must be adjusted according to this input standard color
space. The user should consider that the color component
conversion might use different scale values. For example,
SMPTE 293M uses the following equations for conversion:
R
= Y + 1.402Pr
G
= Y – 0.714Pr – 0.344Pb
B
= Y + 1.773Pb
The manual RGB matrix adjust feature can be used to control
the HD output levels in cases where the video output does not
conform to the standard due to altering the DAC output stages
such as termination resistors. The programmable RGB matrix is
used for external HD/PS data and is not functional when internal
test patterns are enabled. To adjust Registers 0x05 to 0x09, the
manual RGB matrix adjust must be enabled [Register 0x02,
Bit 3 = 1].
Programming the RGB Matrix
If custom manipulation of coefficients is required, enable the
RGB matrix in Address 0x02, Bit 3, set the output to RGB
[Address 0x02, Bit 5], and disable sync on PrPb (default)
[Address 0x15, Bit 2]. Enabling sync on RGB is optional
[Address 0x02, Bit 4].
GY at Addresses 0x03 and 0x05 controls the green signal output
levels. BU at Addresses 0x04 and 0x08 controls the blue signal
output levels, and RV at Addresses 0x04 and 0x09 control the red
signal output levels. To control YPrPb output levels, enable the
YUV output [Address 0x02, Bit 5]. In this case GY [Address 0x05;
Address 0x03, Bits 0 and 1] is used for the Y output, RV
[Address 0x09; Address 0x04, Bits 0 and 1] is used for the Pr
output, and BU [Address 0x08; Address 0x04, Bits 2 and 3] is
used for the Pb output.
If RGB output is selected, the RGB matrix scaler uses the
following equations:
G
= GY × Y + GU × Pb + GV × Pr
B
= GY × Y + BU × Pb
R
= GY × Y + RV × Pr
If YPrPb output is selected, the following equations are used:
Y
= GY × Y
U
= BU × Pb
V
= RV × Pr
Upon power-up, the RGB matrix is programmed with the
default values listed in Table 31.
Table 31. RGB Matrix Default Values
Address
Default
0x03
0x04
0xF0
0x05
0x4E
0x06
0x0E
0x07
0x24
0x08
0x92
0x09
0x7C
When the manual RGB matrix adjust feature is not enabled, the
ADV7320/ADV7321 automatically scale YCrCb inputs to all
standards supported by this part as selected by the input mode
Register 0x01 [6:4].
SD Luma and Color Control
[Subaddresses 0x5C, 0x5D, 0x5E, 0x5F]
SD Y Scale, SD Cr Scale, and SD Cb Scale are three 10-bit-wide
control registers that scale the Y, Cb, and Cr output levels.
Each of these registers represents the value required to scale the
Cb or Cr level from 0.0 to 2.0 and the Y level from 0.0 to 1.5 of
its initial level. The value of these 10 bits is calculated using the
following equation:
Y, Cr, or Cb Scalar Value
= Scale Factor × 512
For example,
Scale Factor
= 1.18
Y, Cb, or Cr Scale Value
= 1.18 × 512 = 665.6
Y, Cb, or Cr Scale Value
= 665 (rounded to the nearest
integer
)
Y, Cb, or Cr Scale Value
= 1010 0110 01b
Address 0x5C, SD LSB Register = 0x15
Address 0x5D, SD Y Scale Register = 0xA6
Address 0x5E, SD Cb Scale Register = 0xA6
Address 0x5F, SD Cr Scale Register = 0xA6
Note that this feature affects all interlaced output signals, that is,
CVBS, Y-C, YPrPb, and RGB.
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