參數(shù)資料
型號： AD9865CHIPS
廠商： ANALOG DEVICES INC
元件分類： 通信及網(wǎng)絡
英文描述： Broadband Modem Mixed-Signal Front End
中文描述： SPECIALTY TELECOM CIRCUIT, UUC
封裝： DIE
文件頁數(shù)： 15/48頁
文件大小： 1672K
代理商： AD9865CHIPS
AD9865
Rx PATH TYPICAL PERFORMANCE CHARACTERISTICS
Rev. A | Page 15 of 48
AVDD = CLKVDD = DVDD = DRVDD = 3.3 V, f
OSCIN
= f
ADC
= 50 MSPS, low-pass filter disabled, RxPGA = 0 dB, AIN = 1 dBFS,
RIN = 50 , half- or full-duplex interface, default power bias settings.
0
TIME (ns)
C
0
80
160
240
320
400
480
560
640
720
512
64
128
192
256
320
384
448
Figure 21. RxPGA Settling Time 12 dB to +48 dB Transition for DC Input
(f
ADC
= 50 MSPS, LPF Disabled)
0
INPUT FREQUENCY (MHz)
A
0
5
10
15
20
25
30
35
40
45
50
0
–18
–15
–12
–9
–6
–3
3.3V
3.0V
3.6V
Figure 22. Rx Low-Pass Filter Amplitude Response vs. Supply
(f
ADC
= 50 MSPS
,
f
3 dB
= 33 MHz, RxPGA = 0 dB)
0
FREQUENCY (MHz)
A
@
0
5
10
15
20
25
30
35
140
60
70
80
90
100
110
120
130
TxDAC ISOLATION @ 0dB
IAMP ISOLATION @ 0dB
Figure 23. Rx to Tx Full-Duplex Isolation @ 0 RxPGA Setting
(Note: ATTEN
@ RxPGA = x dB
= ATTEN
@ RxPGA = 0 dB
RxPGA Gain)
0
TIME (ns)
C
0
80
160
240
320
400
480
560
640
720
352
320
288
256
224
192
160
128
96
64
Figure 24. RxPGA Settling Time for 0 dB to +5 dB Transition for DC Input
(f
ADC
= 50 MSPS, LPF Disabled)
0
INPUT FREQUENCY (MHz)
F
0
5
10
15
20
25
30
35
40
50
45
0
–20
–16
–18
–14
–12
–10
–8
–6
–2
–4
–6dB GAIN
0dB GAIN
+6dB GAIN
+18dB GAIN
+30dB GAIN
+42dB GAIN
Figure 25. Rx Low-Pass Filter Amplitude Response vs. RxPGA Gain
(LPF's f
3 dB
= 33 MHz)
0
FREQUENCY (MHz)
R
)
C
5
105
95
85
75
65
55
45
35
25
15
420
320
10
0
1
2
3
4
5
6
7
8
9
330
340
350
360
370
380
390
400
410
R
IN
C
IN
Figure 26. Rx Input Impedance vs. Frequency
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