參數(shù)資料
型號(hào)： AD9887
廠商： Analog Devices, Inc.
英文描述： Dual Interface for Flat Panel Displays
中文描述： 雙接口的平板顯示器
文件頁數(shù)： 1/40頁
文件大小： 321K
代理商： AD9887
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD9887
Tel: 781/329-4700
Analog Devices, Inc., 2001
Dual Interface for
Flat Panel Displays
FEATURES
Analog Interface
140 MSPS Maximum Conversion Rate
330 MHz Analog Bandwidth
0.5 V to 1.0 V Analog Input Range
500 ps p-p PLL Clock Jitter at 140 MSPS
3.3 V Power Supply
Full Sync Processing
Midscale Clamp
4:2:2 Output Format Mode
Digital (DVI 1.0 Compatible) Interface
112 MHz Operation (1 Pixel/Clock Mode)
High Skew Tolerance of One Full Input Clock
Sync Detect for
“
Hot Plugging
”
APPLICATIONS
RGB Graphics Processing
LCD Monitors and Projectors
Plasma Display Panels
Scan Converters
Micro Displays
Digital TV
GENERAL DESCRIPTION
The AD9887 offers designers the flexibility of a dual analog and
digital interface for flat panel displays (FPDs) on a single chip.
Both interfaces are optimized for excellent image quality supporting
display resolutions up to SXGA (1280
×
1024 at 75 Hz). Either the
analog or the digital interface can be selected by the user.
Analog Interface
For ease of design and to minimize cost, the AD9887 is a fully
integrated interface solution for FPDs. The AD9887 includes an
analog interface with a 140 MHz triple ADC with internal 1.25 V
reference, PLL to generate a pixel clock from HSYNC, program-
mable gain, offset, and clamp control. The user provides only a
3.3 V power supply, analog input, and HSYNC. Three-state
CMOS outputs may be powered from 2.5 V to 3.3 V.
The AD9887’s on-chip PLL generates a pixel clock from HSYNC.
Pixel clock output frequencies range from 12 MHz to 140 MHz.
PLL clock jitter is 500 ps p-p typical at 140 MSPS. When a
COAST signal is presented, the PLL maintains its output fre-
quency in the absence of HSYNC. A sampling phase adjustment is
provided. Data, HSYNC and Clock output phase relationships are
maintained. The PLL can be disabled and an external clock input
provided as the pixel clock. The AD9887 also offers full sync pro-
cessing for composite sync and sync-on-green applications.
A clamp signal is generated internally or may be provided by
the user through the CLAMP input pin. The analog interface
is fully programmable via a 2-wire serial interface.
FUNCTIONAL BLOCK DIAGRAM
SERIAL REGISTER
AND
POWER MANAGEMENT
SCL
SDA
A
1
A
0
2
DATACK
HSOUT
VSOUT
SOGOUT
Rx0+
Rx0–
Rx1+
Rx1–
Rx2+
Rx2–
RxC+
RxC–
R
TERM
DVI
RECEIVER
8
8
8
R
OUTA
R
OUTB
8
8
8
G
OUTA
G
OUTB
8
8
8
B
OUTA
B
OUTB
2
DATACK
DE
HSYNC
VSYNC
AD9887
DIGITAL
INTERFACE
R
OUTA
R
OUTB
G
OUTA
G
OUTB
B
OUTA
B
OUTB
HSOUT
VSOUT
SOGOUT
DE
DATACK
8
8
8
8
8
8
2
SYNC
PROCESSING
AND CLOCK
GENERATION
HSYNC
VSYNC
COAST
CLAMP
CKINV
CKEXT
FILT
CLAMP
R
AIN
CLAMP
G
AIN
CLAMP
B
AIN
A/D
8
8
8
R
OUTA
R
OUTB
A/D
8
8
8
G
OUTA
G
OUTB
A/D
8
8
8
B
OUTA
B
OUTB
ANALOG
INTERFACE
M
U
X
E
S
S
CDT
REFIN
REF
REFOUT
Digital Interface
The AD9887 contains a Digital Video Interface (DVI 1.0) compat-
ible receiver. This receiver supports displays ranging from VGA
to SXGA (25 MHz to 112 MHz). The receiver operates with
true color (24-bit) panels in 1 or 2 pixel(s)/clock mode, and also
features an intrapair skew tolerance up to one full clock cycle.
Fabricated in an advanced CMOS process, the AD9887 is pro-
vided in a 160-lead MQFP surface mount plastic package and is
specified over the 0
°
C to 70
°
C temperature range.
相關(guān)PDF資料
PDF描述
AD9888 100/140/170/205 MSPS Analog Flat Panel Interface
AD9888KS-100 100/140/170/205 MSPS Analog Flat Panel Interface
AD9888KS-140 TRI N PLUG F 2-13
AD9888KS-170 TRI N RECP M FLG 2-13
AD9888KS-205 TRI N RECP M J/N 2-13
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9887/PCB 制造商:Analog Devices 功能描述:INTRFC DUAL FOR FLAT PNL DISPLAYS 160MQFP - Bulk
AD9887A 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays
AD9887A/PCB 制造商:Analog Devices 功能描述:INTRFC FOR FLAT PNL DISPLAY 16SOIC W - Bulk
AD9887AKS-100 制造商:Analog Devices 功能描述:Interface for Flat Panel Display 160-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:DUAL A/D INTERFACE FOR FLAT PANEL - Bulk
AD9887AKS-140 制造商:Rochester Electronics LLC 功能描述:DUAL A/D INTERFACE FOR FLAT PANEL - Bulk 制造商:Analog Devices 功能描述:
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