參數(shù)資料
型號： 28F640J5
英文描述： Dual-Slot, PCMCIA Analog Power Controller
中文描述： 28F640J5 -英特爾StrataFlash內(nèi)存技術(shù)，32和64兆比特
文件頁數(shù)： 50/53頁
文件大?。?/td> 306K
代理商： 28F640J5
INTEL
StrataFlash MEMORY TECHNOLOGY, 32 AND 64 MBIT
E
50
PRELIMINARY
STS (R)
RP# (P)
V
IH
V
IL
V
IH
V
IL
P1
P2
0606_18
NOTES:
STS is shown in its default mode (RY/BY#).
Figure 18. AC Waveform for Reset Operation
Reset Specifications
(1)
#
Sym.
Parameter
Notes
Min
Max
Unit
P1
t
PLPH
RP# Pulse Low Time
(If RP# is tied to V
CC
, this specification is not applicable)
RP# High to Reset during Block Erase, Program, or
Lock-Bit Configuration
2
35
μs
P2
t
PHRH
3
100
ns
NOTES:
1.
2.
These specifications are valid for all product versions (packages and speeds).
If RP# is asserted while a block erase, program, or lock-bit configuration operation is not executing then the minimum
required RP# Pulse Low Time is 100 ns.
A reset time, t
PHQV
, is required from the latter of STS (in RY/BY# mode) or RP# going high until outputs are valid.
3.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F640L18 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash Wireless Memory
28F640L30 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel StrataFlash㈢ Wireless Memory with 3.0-Volt I/O (L30)
28F640P3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory
28F640W30 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30)
28F650 制造商:Cinch Connectors 功能描述:1 Lug Terminal Strip
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