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參數(shù)資料
| 型號： | 28F640J5 |
| 英文描述： | Dual-Slot, PCMCIA Analog Power Controller |
| 中文描述： | 28F640J5 -英特爾StrataFlash內(nèi)存技術(shù)，32和64兆比特 |
| 文件頁數(shù)： | 41/53頁 |
| 文件大?。?/td> | 306K |
| 代理商： | 28F640J5 |
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E
The CUI latches commands issued by system
software and is not altered by V
PEN
, CE
0
, CE
1
, or
CE
2
transitions, or WSM actions. Its state is read
array mode upon power-up, after exit from
reset/power-down mode, or after V
CC
transitions
below V
LKO
. V
CC
must be kept at or above V
PEN
during V
CC
transitions.
INTEL
StrataFlash MEMORY TECHNOLOGY, 32 AND 64 MBIT
41
PRELIMINARY
After block erase, program, or lock-bit configuration,
even after V
PEN
transitions down to V
PENLK
, the CUI
must be placed in read array mode via the Read
Array command if subsequent access to the
memory array is desired. V
PEN
must be kept at or
below V
CC
during V
PEN
transitions.
5.5
Power-Up/Down Protection
The device is designed to offer protection against
accidental block erasure, programming, or lock-bit
configuration during power transitions. Internal
circuitry resets the CUI to read array mode at
power-up.
A system designer must guard against spurious
writes for V
CC
voltages above V
LKO
when V
PEN
is
active. Since WE# must be low and the device
enabled (see Table 2, Chip Enable Truth Table) for
a command write, driving WE# to V
IH
or disabling
the device will inhibit writes. The CUI’s two-step
command sequence architecture provides added
protection against data alteration.
Keeping V
PEN
below V
PENLK
prevents inadvertent
data alteration. In-system block lock and unlock
capability protects the device against inadvertent
programming. The device is disabled while RP# =
V
IL
regardless of its control inputs.
5.6
Power Dissipation
When designing portable systems, designers must
consider battery power consumption not only during
device operation, but also for data retention during
system idle time. Flash memory’s nonvolatility
increases usable battery life because data is
retained when system power is removed.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F640L18 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:StrataFlash Wireless Memory |
| 28F640L30 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel StrataFlash㈢ Wireless Memory with 3.0-Volt I/O (L30) |
| 28F640P3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
| 28F640W30 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30) |
| 28F650 | 制造商:Cinch Connectors 功能描述:1 Lug Terminal Strip |
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