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XRT79L71
PRELIMINARY
417
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
The Receive Payload Data Output Interface block (within the XRT79L71) will indicate that it is processing the
very first bit of a given E3 frame by pulsing the "RxFrame" output pin "HIGH" for one bit-period.
The
"RxFrame" output pin will be held "LOW" at all other times.
Finally, the Receive Payload Data Output Interface block (within the XRT79L71) permits the System-Side
Terminal Equipment to identify a given bit (that is being output via the "RxSer" output pin) as either an
"overhead" or a "payload" bit by pulsing the "RxOH_Ind" output pin "HIGH" (for one bit-period) coincident to
whenever the Receive Payload Data Output Interface block outputs an overhead bit via the "RxSer" output pin.
Conversely, the Receive Payload Data Output Interface block will hold the "RxOH_Ind" output pin "LOW"
coincident to whenever the Receive Payload Data Output Interface block outputs a payload bit via the "RxSer"
output pin.
NOTE:
Since the E3, ITU-T G.751 framing format consists of 12 or 16 consecutive overhead bits, whenever the
"RxOH_Ind" output pin pulses "high" (in order to denote an overhead bit), it will typically pulse high for 12 or 16
consecutive RxCLK periods
Configuring the XRT79L71 to operate in Serial Mode.
The user can configure the XRT79L71 to operate in the Serial Mode by executing the following steps.
STEP 1 - Design your board such that the System-Side Terminal Equipment circuitry interfaces to the
Receive Payload Data Input Interface in the manner as depicted above in Figure 189. STEP 2 - Configure the XRT79L71 to operate in the Serial Mode
This can be accomplished by setting the "NibIntf" input pin to a logic "LOW".
NOTE: This step also configures the "Transmit Payload Data Input Interface" block to operate in the "Serial Mode".
Operating the Receive Payload Data Output Interface in the "Non-Gapped Clock" Mode
FIGURE 190. AN ILLUSTRATION OF THE BEHAVIOR OF THE "SYSTEM-SIDE TERMINAL EQUIPMENT" SIGNALS FOR
"SERIAL MODE" OPERATION
System-Side Terminal Equipment Signals
E3_Clock_In
E3_Data_In
Rx_Start_of_Frame
E3_Overhead_Ind
XRT79L71 Receive Payload Data Output Interface Signals
RxClk
RxSer
RxFrame
RxOH_Ind
Payload[1522]
Payload[1523]
FAS Byte – Bit 1 FAS Byte – Bit 2
Payload[1522]
Payload[1523]
FAS Byte – Bit 1 FAS Byte – Bit 2
E3 Frame Number N
E3 Frame Number N + 1
Note: RxFrame pulses high to denote
E3 Frame Boundary.
Note: RxOH_Ind pulses high to
denote Overhead Data
(e.g., the FAS Pattern).