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PRELIMINARY
XRT79L71
388
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
5.3.2.6
DETECTING BIP-4 NIBBLE ERRORS
If the Receive E3 Framer block has been configured accordingly, it has the responsibility for detecting and
flagging the occurrence of BIP-4 nibble errors.
If the Receive E3 Framer block is configured to compute and verify the BIP-4 nibbles, within the incoming E3
data-stream, then set Bit 0 (RxBIP-4 Enable) within the "Receive E3 Configuration and Status Register #1" to
"1" as depicted below.
Assuming that the user implement the "above-mentioned" procedure, then the Receive E3 Framer block has
the responsibility for detecting and flagging the occurrence of BIP-4 Nibbles, as described below.
Processing at the Remote Terminal Equipment
As the remote terminal equipment is generating and transmitting the E3 data-stream (that the local terminal
equipment will ultimately receive and process), it will compute the BIP-4 value over an entire E3 frame. The
results of this BIP-4 calculation will be inserted into the BIP-4 Nibble-position, within the very next "outbound"
E3 frame. The purpose of the BIP-4 Nibble is to support Performance Monitoring and Error Detection within
the E3 data-stream, as it is transported from one terminal equipment to another.
Processing at the Local Terminal Equipment
As the Receive E3 Framer block receives a given E3 frame (that was generated by the remote terminal
equipment) it will locally-compute its own BIP-4 value for this incoming E3 frame. Afterwards, the Receive E3
Framer block will compare its "locally-computed" BIP-4 value with the contents of the BIP-4 nibble, within the
very next incoming E3 frame. If these two values match, then the Receive E3 Framer block will "conclude" that
it has received this particular E3 frame, in an un-erred manner. Conversely, if these two values DO NOT
match, then the Receive E3 Framer block will "conclude" that is has received this particular E3 frame, in an
erred manner.
If the Receive E3 Framer block determines that the BIP-4 Nibble (within a given E3 frame) is erred, then it will
do the following.
Receive E3 Interrupt Status Register # 2 - G.751 (Address = 0x1115)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Change of
FERF/RDI
Defect
Condition
Interrupt
Status
Detection of
BIP-4
Error
Interrupt
Status
Detection of
FAS Bit
Error
Interrupt
Status
Reserved
R/O
RUR
R/O
0
1
0
Receive E3 Configuration and Status Register # 1 - G.751 (Address = 0x1110)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
RxFERF
Algo
Unused
RxBIP-4
Enable
R/O
R/W
R/O
R/W
0
X
0
1