參數(shù)資料
型號(hào)： XC2S150E-6FT256I
廠商： Xilinx Inc
文件頁(yè)數(shù)： 43/108頁(yè)
文件大?。?/td> 0K
描述： SPARTAN FPGA 150000 GATE 1.8V
產(chǎn)品變化通告： FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝： 90
系列： Spartan®-IIE
LAB/CLB數(shù)： 864
邏輯元件/單元數(shù)： 3888
RAM 位總計(jì)： 49152
輸入/輸出數(shù)： 182
門(mén)數(shù)： 150000
電源電壓： 1.71 V ~ 1.89 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 256-LBGA
供應(yīng)商設(shè)備封裝： 256-FTBGA
其它名稱： Q1280323
4
DS077-1 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Introduction and Ordering Information
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
General Overview
The Spartan-IIE family of FPGAs have a regular, flexible,
programmable architecture of Configurable Logic Blocks
(CLBs), surrounded by a perimeter of programmable
Input/Output Blocks (IOBs). There are four Delay-Locked
Loops (DLLs), one at each corner of the die. Two columns
of block RAM lie on opposite sides of the die, between the
CLBs and the IOB columns. The XC2S400E has four col-
umns and the XC2S600E has six columns of block RAM.
These functional elements are interconnected by a powerful
hierarchy of versatile routing channels (see Figure 1).
Spartan-IIE FPGAs are customized by loading configura-
tion data into internal static memory cells. Unlimited repro-
gramming cycles are possible with this approach. Stored
values in these cells determine logic functions and intercon-
nections implemented in the FPGA. Configuration data can
be read from an external serial PROM (master serial mode),
or written into the FPGA in slave serial, slave parallel, or
Boundary Scan modes. Xilinx offers multiple types of
low-cost configuration solutions including the Platform
Flash in-system programmable configuration PROMs.
Spartan-IIE FPGAs are typically used in high-volume appli-
cations where the versatility of a fast programmable solution
adds benefits. Spartan-IIE FPGAs are ideal for shortening
product development cycles while offering a cost-effective
solution for high volume production.
Spartan-IIE FPGAs achieve high-performance, low-cost
operation through advanced architecture and semiconduc-
tor technology. Spartan-IIE devices provide system clock
rates beyond 200 MHz. In addition to the conventional ben-
efits of high-volume programmable logic solutions, Spar-
tan-IIE FPGAs also offer on-chip synchronous single-port
and dual-port RAM (block and distributed form), DLL clock
drivers, programmable set and reset on all flip-flops, fast
carry logic, and many other features.
Spartan-IIE Family Compared to Spartan-II
Family
Higher density and more I/O
Higher performance
Unique pinouts in cost-effective packages
Differential signaling
-
LVDS, Bus LVDS, LVPECL
VCCINT = 1.8V
-Lower power
-
5V tolerance with external resistor
-
3V tolerance directly
PCI, LVTTL, and LVCMOS2 input buffers powered by
VCCO instead of VCCINT
Unique larger bitstream
Figure 1: Basic Spartan-IIE Family FPGA Block Diagram
DLL
BLOCK
RAM
BLOCK
RAM
BLOCK
RAM
BLOCK
RAM
I/O LOGIC
CLBs
DS077_01_052102
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC2S150E-6FTG256C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE FPGA
XC2S150E-6FTG256I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE FPGA
XC2S150E-6PQ208C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE 1.8V FPGA Family
XC2S150E-6PQ208C0818 制造商:Xilinx 功能描述:
XC2S150E-6PQ208I 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE 1.8V FPGA Family
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