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參數(shù)資料
| 型號： | V29C51400B |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | High Speed 4 MEGA Bit 5 Volt CMOS Flash Memory(高速4M位5V CMOS閃速存儲器) |
| 中文描述： | 高速4兆的5伏的CMOS閃存（高速分位5V的CMOS閃速存儲器） |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 76K |
| 代理商： | V29C51400B |
10
V29C51400T/V29C51400B Rev. 1.0 February 1999
MOSEL V ITELIC
V29C51400T/V29C51400B
Functional Description
The V29C51400T/V29C51400B consists of 512
equally-sized sectors of 512 bytes each. The 16 KB
lockable Boot Block is intended for storage of the
system BIOS boot code. The boot code is the first
piece of code executed each time the system is
powered on or rebooted.
The V29C51400 is available in two versions: the
V29C51400T with the Boot Block address starting
from 7B000H to 7FFFFH, and the V29C51400B
with the Boot Block address starting from 00000H
to 3FFFH.
Read Cycle
A read cycle is performed by holding both CE
and OE signals LOW. Data Out becomes valid only
when these conditions are met. During a read cycle
WE must be HIGH prior to CE and OE going LOW.
WE must remain HIGH during the read operation
for the read to complete (see Table 1).
Output Disable
Returning OE or CE HIGH, whichever occurs first
will terminate the read operation and place the l/O
pins in the HIGH-Z state.
Standby
The device will enter standby mode when the CE
signal is HIGH. The l/O pins are placed in the
HIGH-Z, independent of the OE input state.
Byte Write Cycle
The V29C51400T/V29C51400B is programmed
on a byte-by-byte basis. The byte write operation is
initiated by using a specific four-bus-cycle
sequence: two unlock program cycles, a program
setup command and program data program cycles
(see Table 2).
During the byte write cycle, addresses are
latched on the falling edge of either CE or WE,
whichever is last. Data is latched on the rising edge
of CE or WE, whichever is first. The byte write cycle
can be CE controlled or WE controlled.
Sector Erase Cycle
The V29C51400T/V29C51400B features a
sector erase operation which allows each sector to
be erased and reprogrammed without affecting
data stored in other sectors. Sector erase operation
is initiated by using a specific six-bus-cycle
sequence: Two unlock program cycles, a setup
command, two additional unlock program cycles,
and the sector erase command (see Table 2). A
sector must be first erased before it can be re-
written. While in the internal erase mode, the
device ignores any program attempt into the
device. The internal erase completion can be
determined via DATA polling or toggle bit status.
The V29C51400T/V29C51400B is shipped fully
erased (all bits = 1).
16KB Boot Block
16KB Boot Block
V29C51002T x 8
V29C51002B x 16
7FFFFH
7B000H
00000H
03FFFH
00000H
3FFFH
3DFFH
03FFFH 01FFF
00000H
51002-15
16KB Boot Block = 32 Sectors
Table 1. Operation Modes Decoding
NOTES:
1.
2.
X = Don’t Care, V
IH
= HIGH, V
IL
= LOW, V
H
= 12.5V Max.
PD: The data at the byte address to be programmed.
Decoding Mode
Read
Byte Write
Standby
Autoselect Device ID
Autoselect Manufacture ID
Enabling Boot Block Protection Lock
Disabling Boot Block Protection Lock
Output Disable
CE
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
H
V
IL
OE
V
IL
V
IH
X
V
IL
V
IL
V
H
V
H
V
IH
WE
V
IH
V
IL
X
V
IH
V
IH
V
IL
V
IL
V
IH
A
0
A
0
A
0
X
V
IH
V
IL
X
X
X
A
1
A
1
A
1
X
V
IL
V
IL
X
X
X
A
9
A
9
A
9
X
V
H
V
H
V
H
V
H
X
I/O
READ
PD
HIGH-Z
CODE
CODE
X
X
HIGH-Z
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