參數(shù)資料
型號(hào): UPD30181AYF1-131-GA3-A
廠商: NEC Corp.
英文描述: 64-/32-BIT MICROPROCESSOR
中文描述: 64-/32-BIT微處理器
文件頁(yè)數(shù): 51/72頁(yè)
文件大?。?/td> 447K
代理商: UPD30181AYF1-131-GA3-A
Data Sheet U16277EJ1V0DS
51
μ
PD30181A, 30181AY
(c) READY mode timing (RDYSYN = 1)
Hi-Z
Hi-Z
t
EXS
t
EXH
t
EXCL
t
EXRDYH
2t
TClock
+t
LClock
+t
EXD
t
TClock
+t
EXD
t
TClock
+t
EXD
Note
CSOFF
+t
EXD
CONOFF
+t
EXD
RMINWID
+t
EXD
CONSET
+t
EXD
BUSIDLE
+t
EXD
t
EXD
t
EXD
t
EXD
t
EXZ
t
EXD
A(24:0), UBE#
(output)
ROMCS#, PCS(4:0)#
(output)
IORD#, IOWR#,
MEMRD#, MEMWR#
(output)
SYSDIR
(output)
IORDY
(input)
SYSEN#
(output)
D(31:0)
(write)
D(31:0)
(read)
Note
Input
Note
Output
Remarks 1.
CONSET, CSOFF, RMINWID, CONOFF, and BUSIDLE are the timing parameters that can be
changed by setting registers of the EXIBU. Each timing parameter is defined as the number of
LClock cycles.
2.
The circles indicate the sampling timing.
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