參數(shù)資料
型號(hào)： TVP5041PFP
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： COLOR SIGNAL DECODER, PQFP80
封裝： POWER, PLASTIC, TQFP-80
文件頁(yè)數(shù)： 101/106頁(yè)
文件大小： 501K
代理商： TVP5041PFP
2–78
2.13.71 Parallel Host Interface Status/Interrupt A
VIP address
N/A
PHI address
11b
I2C address
N/A
7
6
5
4
3
2
1
0
TvpLOCK state
TvpLOCK interrupt
Cycle complete
Bus error
CC odd field
CC even field
Teletext threshold
Teletext data
The read-write register is only accessible when the VMI interface is enabled. To access this register, use the direct
address of 11. Notice almost all the VMI registers are accessed through an indirect address scheme, by writing the
indirect address to address 00 and then writing to or reading from address 01. This register contains the same
information as the interrupt status register A at indirect address C0 and is the recommended way of reading the
interrupt/status information due to its efficiency. After an interrupt condition is set, it can be reset by writing to this
register with a 1 in the appropriate bit(s).
tvpLOCK state
0 = TVP not locked to video (default)
1 = TVP locked to video signal
Reflects the present state of the tvpLOCK.
tvpLOCK interrupt
0 = A transition has not occurred on the tvpLOCK signal (default)
1 = A transition has occurred on the tvpLOCK signal
Note, an interrupt is generated on any transition of the lock signal.
Cycle complete
0 = Read or write cycle in progress
1 = Read or write cycle complete (default)
Bus error
0 = No bus error (default)
1 = PHI interface detected an illegal access
CC odd field
0 = Buffer empty (default)
1 = Odd field closed caption buffer contains data
CC even field
0 = Buffer empty (default)
1 = Even field closed caption buffer contains data
Teletext threshold
0 = Threshold not reached (default)
1 = Teletext data in buffer has reached configurable threshold
Teletext data
0 = Teletext data buffer empty or we have not reached the video line number that equals the
interrupt line number register (default)
1 = Teletext data buffer contains a complete transaction and the video line number =
interrupt line number
Note this bit can be configured to occur whenever the video line number = interrupt line
number register regardless of the data.
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