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參數(shù)資料
| 型號(hào)： | TSC2302IRGZRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | GREEN, PLASTIC, VQFN-48 |
| 文件頁數(shù)： | 73/85頁 |
| 文件大小： | 1483K |
| 代理商： | TSC2302IRGZRG4 |
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TSC2302
SLAS394 – JULY 2003
Bit 0 — DEEMP
De-emphasis control. This bit turns ON/OFF the de-emphasis function.
Table 48. De-Emphasis Control
DEEMP
DESCRIPTION
0
De-emphasis is off (default).
1
De-emphasis is on.
GPIO CONTROL REGISTER (Page 02, Address 06h)
The GPIO control register controls the GPIO pins of the TSC2302. The direction of each GPIO pin can be set
independently. For GPIOs configured as output pins, the data to be driven is written to this register. For GPIO’s
configured as inputs, the input data can be read from this register. This register also contains a bit, SDAVB which
mirrors the state of the DAVB output line.
The GPIO Control Register is formatted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
RESV
IO5
RESV
GPIO5
RESV
Bits 15,14 — RESERVED
These bits are reserved and should be written to 0. If read, they read back as 0.
Bit 13 — IO5
GPIO Directional Control. This bit controls the direction of the TSC2302s GPIO pin. When this bit is set to one,
the corresponding GPIO pin is configured as an output. When this bit is set to zero, the corresponding GPIO pin
is configured as an input. The default setting of this bit is zero (input).
Bits 7,6 — RESERVED
These bits are reserved, and should be written to 0. If read, they read back as 0.
Bits 5 — GPIO5
GPIO Data. This bit controls the data on the GPIO pin. When the GPIO pin is configured as an output, the data
written to this bit is driven on the GPIO pin. When the GPIO pin is configured as an input, the data input on the
GPIO pin is returned to the corresponding register bit, and can be read by the host processor.
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