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參數(shù)資料
| 型號： | TSC2302IRGZRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | GREEN, PLASTIC, VQFN-48 |
| 文件頁數(shù)： | 68/85頁 |
| 文件大?。?/td> | 1483K |
| 代理商： | TSC2302IRGZRG4 |
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TSC2302
SLAS394 – JULY 2003
Bits [14:8] — DAVL6- DAVL0
Left DAC Volume Control. These 7 bits control the gain setting of the left channel DAC volume control PGA. This
volume control can be programmed from -63.5 dB to 0 dB in 0.5-dB steps. Full volume (0 dB) corresponds to a
setting of 7Fh. Full attenuation (-63.5 dB) corresponds to 00h. The default volume setting is 0 dB.
DAVL[6:0] = 1111111 (127d) = 0 dB (default)
DAVL[6:0] = 0000000 (000d) = -63.5 dB (Min)
1LSB = 0.5 dB
Bit 7 — DAMUR
Right DAC Mute. This bit is used to mute the input to the right channel DAC. The user can set this bit to mute the
DAC while retaining the previous gain setting in DAVR[6:0], so that the gain control returns to the previous gain
setting when DAMUR is cleared. When the DAMUR bit is set, the left DAC digital gain control soft-steps down to
its lowest level, then all zeroes are sent to the interpolation filter of this DAC. This procedure is used to reduce
any audible artifacts (pops or clicks) of the mute procedure. This soft-stepping process is reversed when the
DAMUR bit is cleared (unmute).
Table 35. Right DAC Mute
DAMUR
DESCRIPTION
0
Right channel DAC is active.
1
Right channel DAC is mute. (default)
Bits [6:0] — DAVR6- DAVR0
Right DAC Volume Control. These 7 bits control the gain setting of the right channel DAC volume control. This
volume control can be programmed from -63.5 dB to 0 dB in 0.5-dB steps. Full volume (0dB) corresponds to a
setting of 7Fh. Full attenuation (-63.5 dB) corresponds to 00h. The default volume setting is 0 dB.
DAVR[6:0] = 1111111 (127d) = 0 dB (default)
DAVR[6:0] = 0000000 (000d) = -63.5 dB (Min)
1LSB = 0.5 dB
ANALOG AUDIO BYPASS PATH VOLUME CONTROL REGISTER (Page 02, Address 03h)
The bypass path volume control register controls the independent programmable gain amplifiers (PGA’s) on the
left and right channel analog audio bypass paths of the TSC2302. These bypass paths direct the line inputs
directly to the headphone outputs entirely in the analog domain, with no A/D or D/A conversion. This feature can
be used for playback of an external analog source, such as an FM stereo tuner through the TSC2302’s
headphone amplifier. The gain of these PGA’s can be adjusted from -35.5 dB to 12 dB in 0.5 dB steps. The
bypass paths can also be muted, so that no signal is transmitted.
The bypass path volume control register is formatted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
BPMUL
BPVL6
BPVL5
BPVL4
BPVL3
BPVL2 BPVL1 BPVL0
BPMUR
BPVR6
BPVR5
BPVR4
BPVR3
BPVR2
BPVR
1
0
Bit 15 — BPMUL
Left Channel Audio Bypass Mute. This bit is used to mute the bypass path from the left channel line input
(LLINEIN) to the left channel headphone output. The user can set this bit to mute the bypass path while retaining
the previous gain setting in BPVL[6:0], so that the PGA returns to the previous gain setting when BPMUL is
cleared. When the BPMUL bit is set, the PGA soft-steps down to its lowest level, then the bypass path is muted.
This procedure is used to reduce any audible artifacts (pops or clicks) during the mute operation. This
soft-stepping process is reversed when the BPMUL bit is cleared (unmute).
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