參數(shù)資料
型號(hào): TSC2302IRGZRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: GREEN, PLASTIC, VQFN-48
文件頁數(shù): 64/85頁
文件大?。?/td> 1483K
代理商: TSC2302IRGZRG4
www.ti.com
www.ti.com
TSC2302
SLAS394 – JULY 2003
Bits [9:8] — MICG1-MICG0
Microphone Preamp Gain. These two bits select the gain of the microphone input channel. The gain of the
microphone input channel can be 0 dB, +6 dB, or +12 dB. The default gain of the microphone input channel is 0
dB.
Table 28. Microphone Input Gain Selection
MICG[1:0]
MICG1
MICG0
DESCRIPTION
0
MIC gain = 0 dB (default)
0
1
MIC gain = 0 dB
1
0
MIC gain = 6 dB
1
MIC gain = 12 dB
Bits [7:6] — MCLK1-MCLK0
Master Clock Ratio. These two bits select the ratio of the audio master clock frequency to the audio sampling
frequency. The ratio can be 256 Fs, 384 Fs, or 512 Fs. The default master clock frequency is 256 Fs.
Table 29. Master Clock Ratio Selection
MCLK[1:0]
MCLK1
MCLK0
DESCRIPTION
0
Master clock (MCLK) = 256 x Fs (default)
0
1
Master clock (MCLK) = 384 x Fs
1
0
Master clock (MCLK) = 512 x Fs
1
Master clock (MCLK) = 256 x Fs
Bits [5:2] — I2SFS3-I2SFS0
I2S Sample Rate. These bits tell the internal PLL what the audio sampling rate is so that it provides the proper
clock rate to the data converters and the digital filters. The default sample rate is 48 kHz. See Table 30 for a
complete listing of available sampling rates. All combinations of I2SFS[3:0] not in Table 30 are not valid.
Table 30. I2S Sample Rate Select
I2SFS3
I2SFS2
I2SFS1
I2SFS0
FUNCTION
0
Fs = 48 kHz (default)
0
1
Fs = 44.1 kHz
0
1
0
Fs = 32 kHz
0
1
Fs = 24 kHz
0
1
0
Fs = 22.05 kHz
0
1
0
1
Fs = 16 kHz
0
1
Fs = 12 kHz
0
1
Fs = 11.05 kHz
1
0
Fs = 8 kHz
67
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