參數(shù)資料
型號： THS8210PFP
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： POWER, PLASTIC, TQFP-80
文件頁數(shù)： 73/73頁
文件大?。?/td> 2053K
代理商： THS8210PFP
THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303
DALLAS TEXAS 77265
9
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
Specifications
Absolute maximum ratings over operating free-air temperature range
Supply voltage: AVDD to AVSS, VDD_IO to GND_IO……………………………………………..
–0.5V to 3.6V
DVDD to DVSS, VDD_DLL to DVSS ..................................................…………………………………
–0.5V to 2.0V
Digital input voltage range to DVSS .............................................................................…. –0.5V to VDD_IO+0.5V
Operating free-air temperature range, TA -.................................................……………….
0
°C to 70°C
Storage temperature range, TSTG ...........................................................................................
-55
°C to 150°C
Stresses beyond those listed under ‘a(chǎn)bsolute maximum ratings’ may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under ‘recommended operating
conditions’ is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended operating conditions over operating free-air temperature range TA
Power supply
MIN
NOM
MAX
UNIT
AV
DD
3.0
3.3
3.6
DV
DD,
VDD_DLL
1.65
1.8
2.0
Supply voltage
VDD_IO
1.65
1.8/3.3
3.6
V
Digital & reference inputs
MIN
NOM
MAX
UNIT
V
IH
High-level input voltage
1.35
VDD_IO
V
IL
Low-level input voltage
DVSS
0.8
V
f
clk
Clock frequency
10
205
MHz
t
w(CLKH)
Pulse duration, clock high
TBD
ns
t
w(CLKL)
Pulse duration, clock low
TBD
ns
R
FS
FSADJ resistor
2.05K / 2.94K
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