THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303 DALLAS TEXAS 77265
58
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
dtg2_bp7_8
_
msb
R/W
0x53
Not
Used
dtg2_bp7(10:8)
Not
Used
dtg2_bp8(10:8)
dtg2_bp9_
10_msb
R/W
0x54
Not
Used
dtg2_bp9(10:8)
Not
Used
dtg2_bp10(10:8)
dtg2_bp11_
12_msb
R/W
0x55
Not
Used
dtg2_bp11(10:8)
Not
Used
dtg2_bp12(10:8)
dtg2_bp13_
14_msb
R/W
0x56
Not
Used
dtg2_bp13(10:8)
Not
Used
dtg2_bp14(10:8)
dtg2_bp15_
16_msb
R/W
0x57
Not
Used
dtg2_bp15(10:8)
Not
Used
dtg2_bp16(10:8)
dtg2_bp1_ls
b
R/W
0x58
dtg2_bp1(7:0)
dtg2_bp2_ls
b
R/W
0x59
dtg2_bp2(7:0)
dtg2_bp3_ls
b
R/W
0x5a
dtg2_bp3(7:0)
dtg2_bp4_ls
b
R/W
0x5b
dtg2_bp4(7:0)
dtg2_bp5_ls
b
R/W
0x5c
dtg2_bp5(7:0)
dtg2_bp6_ls
b
R/W
0x5d
dtg2_bp6(7:0)
dtg2_bp7_ls
b
R/W
0x5e
dtg2_bp7(7:0)
dtg2_bp8_ls
b
R/W
0x5f
dtg2_bp8(7:0)
dtg2_bp9_ls
b
R/W
0x60
dtg2_bp9(7:0)
dtg2_bp10_
lsb
R/W
0x61
dtg2_bp10(7:0)
dtg2_bp11_
lsb
R/W
0x62
dtg2_bp11(7:0)
dtg2_bp12_
lsb
R/W
0x63
dtg2_bp12(7:0)
dtg2_bp13_
lsb
R/W
0x64
dtg2_bp13(7:0)
dtg2_bp14_
lsb
R/W
0x65
dtg2_bp14(7:0)
dtg2_bp15_
lsb
R/W
0x66
dtg2_bp15(7:0)
dtg2_bp16_
lsb
R/W
0x67
dtg2_bp16(7:0)
dtg2_
linetype1
R/W
0x68
dtg2_linetype1(3:0)
dtg2_linetype2(3:0)
dtg2_
linetype2
R/W
0x69
dtg2_linetype4(3:0)
dtg2_
linetype3
R/W
0x6a
dtg2_linetype5(3:0)
dtg2_linetype6(3:0)
dtg2_
linetype4
R/W
0x6b
dtg2_linetype7(3:0)
dtg2_linetype8(3:0)
dtg2_
linetype5
R/W
0x6c
dtg2_linetype9(3:0)
dtg2_linetype10(3:0)
dtg2_
linetype6
R/W
0x6d
dtg2_linetype11(3:0)
dtg2_linetype12(3:0)
dtg2_
linetype7
R/W
0x6e
dtg2_linetype13(3:0)
dtg2_linetype14(3:0)
dtg2_
linetype8
R/W
0x6f
dtg2_linetype15(3:0)
dtg2_linetype16(3:0)