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參數(shù)資料
| 型號(hào)： | ST72T85A5Q6 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT MCU FOR RDS WITH 48K ROM, 3K RAM, ADC, TWO TIMERS, TWO SPIs, I2C AND SCI INTERFACES |
| 中文描述： | 8位微控制器48,000鐵路發(fā)展策略光盤，3K內(nèi)存，ADC，兩個(gè)定時(shí)器，2個(gè)SPI，I2C和脊髓損傷接口 |
| 文件頁數(shù)： | 78/117頁 |
| 文件大?。?/td> | 748K |
| 代理商： | ST72T85A5Q6 |
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ST7285C
5 SOFTWARE
5.1 ST7 ARCHITECTURE
The 8-bit ST7 Core is designed for high code effi-
ciency. It contains 6 internal registers, 17 main ad-
dressing modes and 63 instructions. The 6 internal
registers include 2 index registers, an accumula-
tor, a 16-bit Program Counter, a stack pointer and
a condition code register. The two Index registers
X and Y enable Indexed Addressing modes with or
without offset, along with read-modify-write type
data
manipulations.
These
branching routines and data modifications.
The 16-bit Program Counter is able to address up
to 64K of ROM/EPROM memory. The 6-bit Stack
Pointer provides access to a 64-level Stack and an
upgrade to an 8-bit Stack Pointer is foreseen in or-
der to be able to manage a 256-level Stack. The
Core also includes a Condition Code Register pro-
viding 5 Condition Flags that indicate the result of
the last instruction executed.
The 17 main Addressing modes, including Indirect
Relative and Indexed addressing, allow sophisti-
cated branching routines or CASE-type functions.
The Indexed Indirect Addressing mode, for in-
stance, permits look-up tables to be located any-
where in the address space, thus enabling very
flexible programming and compact C-based code.
The 63-instruction Instruction Set is 8-bit oriented
with a 2-byte average instruction size. This In-
struction Set offers, in addition to standard data
movement and logic/arithmetic functions, byte
multiplication, bit manipulation, data transfer be-
tween Stack and Accumulator (Push/Pop) with di-
rect stack access, as well as data transfer using
the X and Y registers.
registers
simplify
5.2 ST7 ADDRESSING MODES
The ST7 Core features 17 different addressing
modes which can be classified in 7 main groups:
The ST7 Instruction set is designed to minimize
the number of bytes required per instruction: To do
so, most of the addressing modes may be subdi-
vided in two sub-modes called long and short:
– The long addressing mode is the most powerful
because it can reach any byte in the 64kb ad-
dressing space, but the instruction is bigger and
slower than the short addressing mode.
– The short addressing mode is less powerful be-
cause it can generally only access page zero
(0000 - 00FFh range), but the instruction size is
more compact, and faster. All memory to memo-
ry instructions are only working with short ad-
dressing modes (CLR, CPL,NEG,BSET, BRES,
BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL,
SRA, SWAP)
Both modes have pros and cons, but the program-
mer does not need to choosewhich one is the best:
theST7Assemblerwillalwayschoosethebestone.
Addressing Mode
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
Example
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset
byte,#5
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