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SMCxxxBF
Electrical interface
READY
(PC card memory mode)
O37
Indicates whether the card is busy (Low), or ready to accept
a new data transfer operation (High). The host socket must
provide a pull-up resistor. At power-up and reset, the Ready
signal is held Low until the commands are completed. No
access should be made during this time. The Ready signal
is held High whenever the card has been powered up with
Reset continuously disconnected or asserted.
–IREQ
(PC card I/O mode)
Interrupt request. It is strobed Low to generate a pulse
mode interrupt or held Low for a level mode interrupt.
INTRQ
(True IDE mode)
Active High interrupt request to the host.
–REG
(PC card memory mode)
I44
Used to distinguish between common memory and register
(attribute) memory accesses. High for common memory,
Low for attribute memory.
–REG
(PC card I/O mode)
Must be Low during I/O cycles when the I/O address is on
the bus.
–DMACK
(True IDE mode)
The –DMACK input signal is used to acknowledge DMA
transfers. It is asserted by the host in response to DMARQ
to initiate the transfer.
When DMA mode is disabled,
the card should ignore the
-DMACK signal.
If the host does not support DMA mode, but only True IDE
mode, this signal should be driven High or tied to VCC by the
host.
RESET
(PC card memory mode)
I41
Resets the card (active High). The card is reset at power-up
only if this pin is left High or unconnected.
RESET
(PC card I/O mode)
Same as PC card memory mode.
–RESET
(True IDE mode)
Hardware reset from the host (active Low).
VCC
(PC card memory mode)
13,38
+5 V, +3.3 V power.
VCC
(PC card I/O mode)
Same for all modes.
VCC
(True IDE mode)
Same for all modes.
–VS1, –VS2
(PC card memory mode)
O
33,40
Voltage sense signals.–VS1 is grounded so that the CIS
can be read at 3.3 volts and –VS2 is reserved by PCMCIA
for a secondary voltage.
–VS1, –VS2
(PC card I/O mode)
Same for all modes.
–VS1, –VS2
(True IDE mode)
Same for all modes.
Table 9.
Signal descriptions (continued)
Signal name
Dir.
Pin
Description