參數(shù)資料
型號： SC16C554B
廠商： NXP Semiconductors N.V.
英文描述： 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
中文描述： 5伏，3.3伏和2.5伏兆5四異步/秒（最大），16字節(jié)的FIFO
文件頁數(shù)： 27/51頁
文件大?。?/td> 253K
代理商： SC16C554B
9397 750 13133
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 9 February 2005
27 of 51
Philips Semiconductors
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
7.4 Interrupt Status Register (ISR)
The SC16C554B/554DB provides four levels of prioritized interrupts to minimize external
software interaction. The Interrupt Status Register (ISR) provides the user with four
interrupt status bits. Performing a read cycle on the ISR will provide the user with the
highest pending interrupt level to be serviced. No other interrupts are acknowledged until
the pending interrupt is serviced. Whenever the interrupt status register is read, the
interrupt status is cleared. However, it should be noted that only the current pending
interrupt is cleared by the read. A lower level interrupt may be seen after re-reading the
interrupt status bits.
Table 13 “Interrupt source”
shows the data values (bits 0 to 5) for the
four prioritized interrupt levels and the interrupt sources associated with each of these
interrupt levels.
Table 12:
FCR[7]
0
0
1
1
RCVR trigger levels
FCR[6]
0
1
0
1
RX FIFO trigger level
1
4
8
14
Table 13:
Priority
level
1
Interrupt source
ISR[5]
ISR[4]
ISR[3]
ISR[2]
ISR[1]
ISR[0]
Source of the interrupt
0
0
0
1
1
0
LSR (Receiver Line Status
Register)
RXRDY (Receive Data
Ready)
RXRDY (Receive Data
time-out)
TXRDY(TransmitterHolding
Register Empty)
MSR (Modem Status
Register)
2
0
0
0
1
0
0
2
0
0
1
1
0
0
3
0
0
0
0
1
0
4
0
0
0
0
0
0
Table 14:
Bit
7:6
Interrupt Status Register bits description
Symbol
Description
ISR[7:6]
FIFOs enabled. These bits are set to a logic 0 when the FIFO is not
being used. They are set to a logic 1 when the FIFOs are enabled.
Logic 0 or cleared = default condition.
ISR[5:4]
Reserved; set to ‘0’.
ISR[3:1]
INT priority bits 2 to 0. These bits indicate the source for a pending
interrupt at interrupt priority levels 1, 2, and 3 (see
Table 13
).
Logic 0 or cleared = default condition.
ISR[0]
INT status.
Logic 0 = An interrupt is pending and the ISR contents may be used
as a pointer to the appropriate interrupt service routine.
Logic 1 = No interrupt pending (normal default condition).
5:4
3:1
0
相關(guān)PDF資料
PDF描述
SC16C754B 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
SC68C752B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and Motorola mP interface
SCAN182245AMTD Non-Inverting Transceiver with 25ohm Series Resistor Outputs
SCAN18245TSSC Non-Inverting Transceiver with 3-STATE Outputs
SCAN18374T D-Type Flip-Flop with 3-STATE Outputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C554B_10 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
SC16C554BIB64 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C554BIB64,128 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C554BIB64,128 PBF 制造商:NXP Semiconductors 功能描述:
SC16C554BIB64,151 功能描述:UART 接口集成電路 4CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*