參數(shù)資料
型號(hào)： SC16C554B
廠商： NXP Semiconductors N.V.
英文描述： 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
中文描述： 5伏，3.3伏和2.5伏兆5四異步/秒（最大），16字節(jié)的FIFO
文件頁(yè)數(shù)： 18/51頁(yè)
文件大?。?/td> 253K
代理商： SC16C554B
9397 750 13133
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 9 February 2005
18 of 51
Philips Semiconductors
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
6.5 Hardware/software and time-out interrupts
Following a reset, if the transmitter interrupt is enabled, the SC16C554B/554DB will issue
an interrupt to indicate that the Transmit Holding Register is empty. This interrupt must be
serviced prior to continuing operations. The LSR register provides the current singular
highest priority interrupt only. Only after servicing the higher pending interrupt will the
lower priority interrupt(s) be reflected in the status register. Servicing the interrupt without
investigating further interrupt conditions can result in data errors.
When two interrupt conditions have the same priority, it is important to service these
interrupts correctly. Receive Data Ready and Receive Time Out have the same interrupt
priority (when enabled by IER[0]). The receiver issues an interrupt after the number of
characters have reached the programmed trigger level. In this case, the
SC16C554B/554DB FIFO may hold more characters than the programmed trigger level.
Following the removal of a data byte, the user should re-check LSR[0] for additional
characters. A Receive Time Out will not occur if the receive FIFO is empty. The time-out
counter is reset at the center of each stop bit received or each time the receive holding
register (RHR) is read. The actual time-out value is 4 character time.
In the 16 mode for the PLCC68 package, the system/board designer can optionally
provide software controlled 3-state interrupt operation. This is accomplished by INTSEL
and MCR[3]. When INTSEL interface pin is left open or made a logic 0, MCR[3] controls
the 3-state interrupt outputs, INTA to INTD. When INTSEL is a logic 1, MCR[3] has no
effect on the INTA to INTD outputs, and the package operates with interrupt outputs
enabled continuously.
6.6 Programmable baud rate generator
The SC16C554B/554DB supports high speed modem technologies that have increased
input data rates by employing data compression schemes. For example, a 33.6 kbit/s
modem that employs data compression may require a 115.2 kbit/s input data rate.
A 128.0 kbit/s ISDN modem that supports data compression may need an input data rate
of 460.8 kbit/s.
(1) RTS is de-asserted when the receiver receives the first data bit of the sixteenth byte. The receive FIFO is full after finishing
the sixteenth byte.
(2) RTS is asserted again when there is at least one byte of space available and no incoming byte is in processing, or there is
more than one byte of space available.
(3) When the receive FIFO is full, the first receive buffer register read re-asserts RTS.
Fig 10. RTS functional timing waveforms, RCV FIFO trigger level = 14 bytes
byte 14
byte 15
RX
RTS
IOR
(RD RBR)
Start
byte 18
Stop
Start
byte 16
Stop
002aaa051
RTS released after the
first data bit of byte 16
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C554B_10 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
SC16C554BIB64 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C554BIB64,128 功能描述:UART 接口集成電路 16CB 2.5V-5V 4CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C554BIB64,128 PBF 制造商:NXP Semiconductors 功能描述:
SC16C554BIB64,151 功能描述:UART 接口集成電路 4CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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