參數(shù)資料
型號(hào)： S29NS512PABBJW003
廠商： SPANSION LLC
元件分類： DRAM
英文描述： MirrorBit Flash Family
中文描述： 32M X 16 FLASH 1.8V PROM, 80 ns, PBGA64
封裝： 8 X 9.20 MM, LEAD FREE, TFBGA-64
文件頁數(shù)： 36/86頁
文件大小： 2234K
代理商： S29NS512PABBJW003
36
S29NS-P MirrorBit
TM
Flash Family
S29NS-P_00_A1 February 20, 2007
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
When the Embedded Program algorithm is complete, the device then returns to the read mode and
addresses are no longer latched. The system can determine the status of the program operation by using
DQ7 or DQ6. Refer to the Write Operation Status section for information on these status bits.
Figure 6.2
Single Word Program
Software Functions and Sample Code
Note
Base = Base Address.
The following is a C source code example of using the single word program function. Refer to the
Spansion
Low Level Driver User’s Guide
(available on
www.spansion.com
) for general information on Spansion Flash
memory software development guidelines.
Table 6.15
Single Word Program
(LLD Function = lld_ProgramCmd)
Cycle
Operation
Byte Address
Word Address
Data
Unlock Cycle 1
Write
Base + AAAh
Base + 555h
00AAh
Unlock Cycle 2
Write
Base + 554h
Base + 2AAh
0055h
Program Setup
Write
Base + AAAh
Base + 555h
00A0h
Program
Write
Word Address
Word Address
Data Word
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Write Program Command:
Address 555h, Data A0h
Program Data to Address:
PA, PD
Unlock Cycle 1
Unlock Cycle 2
Setup Command
Program Address (PA),
Program Data (PD)
Operation failed
Perform Polling Algorithm
(see Write Operation Status
flowchart)
Yes
Yes
No
No
Polling Status
= Busy
Polling Status
= Complete
Error condition
(Exceeded Timing Limits)
Operation successfully completed
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