參數(shù)資料
型號: S1C63567F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP144
封裝: PLASTIC, QFP-144
文件頁數(shù): 52/172頁
文件大小: 1349K
代理商: S1C63567F0A0100
S1C63567 TECHNICAL MANUAL
EPSON
135
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
4.15.1 Interrupt factor
Table 4.15.1.1 shows the factors for generating interrupt requests.
The interrupt flags are set to "1" depending on the corresponding interrupt factors.
The CPU operation is interrupted when an interrupt factor flag is set to "1" if the following conditions are
established.
The corresponding mask register is "1" (enabled)
The interrupt flag is "1" (EI)
The interrupt factor flag is reset to "0" when "1" is written.
At initial reset, the interrupt factor flags are reset to "0".
Since the watchdog timer's interrupt is NMI, the interrupt is generated regardless of the setting above,
and no interrupt factor flag is provided.
Table 4.15.1.1 Interrupt factors
Interrupt factor
Dialer (dialing cycle completion)
Programmable timer 1 (counter = 0)
Programmable timer 0 (counter = 0)
Serial interface (receive error)
Serial interface (receive completion)
Serial interface (transmit completion)
K00–K03 input (falling edge or rising edge)
K10–K13 input (falling edge or rising edge)
Clock timer 1 Hz (falling edge)
Clock timer 2 Hz (falling edge)
Clock timer 8 Hz (falling edge)
Clock timer 32 Hz (falling edge)
Stopwatch timer (1 Hz)
Stopwatch timer (10 Hz)
ID
IPT1
IPT0
ISER
ISRC
ISTR
IK0
IK1
IT3
IT2
IT1
IT0
ISW1
ISW10
(FFF9HD0)
(FFF2HD1)
(FFF2HD0)
(FFF3HD2)
(FFF3HD0)
(FFF3HD1)
(FFF4HD0)
(FFF5HD0)
(FFF6HD3)
(FFF6HD2)
(FFF6HD1)
(FFF6HD0)
(FFF7HD1)
(FFF7HD0)
Interrupt factor flag
Note: After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag =
"1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be
sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to
the interrupt enabled state.
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