參數(shù)資料
型號： R5F562N8ADBG#U0
廠商： Renesas Electronics America
文件頁數(shù)： 112/148頁
文件大?。?/td> 0K
描述： MCU 32BIT FLASH 512KROM 176LFBGA
產(chǎn)品培訓(xùn)模塊： RX Compare Match Timer
RX DMAC
標準包裝： 1
系列： RX600
核心處理器： RX
芯體尺寸： 32-位
速度： 100MHz
連通性： EBI/EMI，I²C，SCI，SPI，USB
外圍設(shè)備： DMA，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 126
程序存儲器容量： 512KB（512K x 8）
程序存儲器類型： 閃存
RAM 容量： 96K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10/12b，D/A 2x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 176-LFBGA
包裝： 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 64
2004 Microchip Technology Inc.
5.2.2
TABLAT – TABLE LATCH REGISTER
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch is used to hold
8-bit data during data transfers between program
memory and data RAM.
5.2.3
TBLPTR – TABLE POINTER
REGISTER
The Table Pointer (TBLPTR) addresses a byte within
the program memory. The TBLPTR is comprised of
three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three regis-
ters join to form a 22-bit wide pointer. The low-order 21
bits allow the device to address up to 2 Mbytes of
program memory space. The 22nd bit allows access to
the Device ID, the User ID and the configuration bits.
The Table Pointer, TBLPTR, is used by the TBLRD and
TBLWT
instructions. These instructions can update the
TBLPTR in one of four ways, based on the table oper-
ation. These operations are shown in Table 5-1. These
operations on the TBLPTR only affect the low-order
21 bits.
5.2.4
TABLE POINTER BOUNDARIES
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the Table
Pointer determine which byte is read from program
memory into TABLAT.
When a TBLWT is executed, the three LSbs of the Table
Pointer (TBLPTR<2:0>) determine which of the eight
program memory holding registers is written to. When
the timed write to program memory (long write) begins,
the
19
MSbs
of
the
Table
Pointer,
TBLPTR
(TBLPTR<21:3>), will determine which program mem-
ory block of 8 bytes is written to. For more detail, see
When an erase of program memory is executed, the
16 MSbs of the Table Pointer (TBLPTR<21:6>) point to
the 64-byte block that will be erased. The Least
Significant bits (TBLPTR<5:0>) are ignored.
Figure 5-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
TABLE 5-1:
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
FIGURE 5-3:
TABLE POINTER BOUNDARIES BASED ON OPERATION
Example
Operation on Table Pointer
TBLRD*
TBLWT*
TBLPTR is not modified
TBLRD*+
TBLWT*+
TBLPTR is incremented after the read/write
TBLRD*-
TBLWT*-
TBLPTR is decremented after the read/write
TBLRD+*
TBLWT+*
TBLPTR is incremented before the read/write
21
16
15
87
0
ERASE – TBLPTR<20:6>
WRITE – TBLPTR<21:3>
READ – TBLPTR<21:0>
TBLPTRL
TBLPTRH
TBLPTRU
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