參數(shù)資料
型號： R5F562N8ADBG#U0
廠商： Renesas Electronics America
文件頁數(shù)： 108/148頁
文件大?。?/td> 0K
描述： MCU 32BIT FLASH 512KROM 176LFBGA
產(chǎn)品培訓模塊： RX Compare Match Timer
RX DMAC
標準包裝： 1
系列： RX600
核心處理器： RX
芯體尺寸： 32-位
速度： 100MHz
連通性： EBI/EMI，I²C，SCI，SPI，USB
外圍設備： DMA，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 126
程序存儲器容量： 512KB（512K x 8）
程序存儲器類型： 閃存
RAM 容量： 96K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10/12b，D/A 2x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 176-LFBGA
包裝： 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 60
2004 Microchip Technology Inc.
4.14
RCON Register
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device Reset. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
REGISTER 4-4:
RCON REGISTER
Note 1: If the BOREN configuration bit is set
(Brown-out Reset enabled), the BOR bit
is ‘1’ on a Power-on Reset. After a Brown-
out Reset has occurred, the BOR bit will
be cleared and must be set by firmware to
indicate the occurrence of the next
Brown-out Reset.
2: It is recommended that the POR bit be set
after
a
Power-on
Reset
has
been
detected, so that subsequent Power-on
Resets may be detected.
R/W-0
U-0
R/W-1
R/W-0
IPEN
—
—RI
TO
PD
POR
BOR
bit 7
bit 0
bit 7
IPEN: Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6-5
Unimplemented: Read as ‘0’
bit 4
RI: RESET Instruction Flag bit
1
= The RESET instruction was not executed
0
= The RESET instruction was executed causing a device Reset
(must be set in software after a Brown-out Reset occurs)
bit 3
TO: Watchdog Time-out Flag bit
1
= After power-up, CLRWDT instruction, or SLEEP instruction
0
= A WDT time-out occurred
bit 2
PD: Power-down Detection Flag bit
1
= After power-up or by the CLRWDT instruction
0
= By execution of the SLEEP instruction
bit 1
POR: Power-on Reset Status bit
1
= A Power-on Reset has not occurred
0
= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOR: Brown-out Reset Status bit
1
= A Brown-out Reset has not occurred
0
= A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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