參數(shù)資料
型號(hào)： PPC440GR-3BB533CZ
廠商： APPLIEDMICRO INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 533 MHz, RISC PROCESSOR, PBGA456
封裝： 35 X 35 MM, PLASTIC, BGA-456
文件頁(yè)數(shù)： 53/88頁(yè)
文件大?。?/td> 1177K
代理商： PPC440GR-3BB533CZ
AMCC Proprietary
57
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Revision 1.19 – May 07, 2008
External Master Peripheral Interface
BusReq
Bus Request. Used when the PPC440GR needs to regain
control of peripheral interface from an external master.
O
Multiplex
ExtAck
External Acknowledgement. Used by the PPC440GR to
indicate that a data transfer occurred.
O
Multiplex
ExtReq
External Request. Used by an external master to indicate it is
prepared to transfer data.
I
Multiplex
1
ExtReset
Peripheral Reset. Used by an external master and by
synchronous peripheral slaves.
O3.3V LVTTL
HoldAck
Hold Acknowledge. Used by the PPC440GR to transfer
ownership of peripheral bus to an external master.
O
Multiplex
HoldReq
Hold Request. Used by an external master to request
ownership of the peripheral bus.
I
Multiplex
1, 5
HoldPri
Hold Primary. Used by an external master to indicate the
priority of a given external master tenure.
I
Multiplex
PerClk
Peripheral Clock. Used by an external master and by
synchronous peripheral slaves.
O3.3V LVTTL
UART Peripheral Interface
UARTSerClk
Serial clock input that provides an alternative to the internally
generated serial clock. Used in cases where the allowable
internally generated clock rates are not satisfactory.
I
3.3V LVTTL
1, 4
UARTn_Rx
UART Receive data.
I
3.3V LVTTL
1, 4
UARTn_Tx
UART Transmit data.
O
3.3V LVTTL
UARTn_DCD
UART Data Carrier Detect.
I
3.3V LVTTL
6
UARTn_DSR
UART Data Set Ready.
I
3.3V LVTTL
6
UARTn_CTS
UART Clear To Send.
I
3.3V LVTTL
1, 6
UARTn_DTR
UART Data Terminal Ready.
O
3.3V LVTTL
UARTn_RTS
UART Request To Send.
O
3.3V LVTTL
UARTn_RI
UART Ring Indicator.
I
3.3V LVTTL
1
IIC Peripheral Interface
IIC0SClk
IIC0 Serial Clock.
I/O
3.3V LVTTL
1, 2
IIC0SData
IIC0 Serial Data.
I/O
3.3V LVTTL
1, 2
IIC10SClk
IIC1 Serial Clock.
I/O
Multiplex
2
IIC1SData
IIC1 Serial Data.
I/O
Multiplex
2
Table 9. Signal Functional Description (Sheet 5 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω to 3.3V)
3. Must pull down (recommended value is 1k
Ω)
4. If not used, must pull up (recommended value is 3k
Ω to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
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