參數(shù)資料
型號： ORT8850H
英文描述： Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
中文描述： 現(xiàn)場可編程系統(tǒng)芯片（促進文化基金）8通道x 850 Mbits /秒背板收發(fā)器
文件頁數(shù)： 60/112頁
文件大?。?/td> 2417K
代理商： ORT8850H
60
Agere Systems Inc.
Data Sheet
August 2001
Eight-Channel x 850 Mbits/s Backplane Transceiver
ORCA
ORT8850 FPSC
Embedded Core LVDS I/O
(continued)
LVDS Receiver Buffer Requirements
Table 25. Receiver ac Data
*
* V
DD
= 3.1 V
—
3.5 V, 0
°
C
—
125
°
C slow-fast process.
Table 26. Receiver Power Consumption
*
* V
DD
= 3.1 V
—
3.5 V, 0
°
C
—
125
°
C slow-fast process.
Table 27. Receiver dc Data
*
* V
DD
= 3.1 V
—
3.5 V, 0
°
C
—
125
°
C slow-fast process.
Table 28. LVDS Operating Parameters
Note:Under worst-case operating condition, the LVDS driver will withstand a disabled or unpowered receiver for an unlimited period of time with-
out being damaged. Similarly, when outputs are short-circuited to each other or to ground, the LVDS will not suffer permanent damage.
The LVDS driver supports hot insertion. Under a well-controlled environment, the LVDS I/O can drive backplane as well as cable.
Parameter
Symbol
t
pwd
t
PLH
t
PHL
t
PD
t
R
t
F
Test Conditions
V
IDTH
= 100 mV, 450 MHz
C
L
= 0.5 pF
Min
—
0.60
0.60
—
150
150
Max
160
1.41
1.47
50
350
350
Unit
ps
ns
ns
ps
ps
ps
Pulse-width Distortion
Propagation Delay Time
With Common-mode Variation (0 V to 2.4 V)
Output Rise Time, 20% to 80%
Output Fall Time, 80% to 20%
C
L
= 0.5 pF
C
L
= 0.5 pF
C
L
= 0.5 pF
Parameter
Symbol
P
Rdc
P
Rac
Test Conditions
dc
ac
C
L
= 0.5 pF
Min
—
—
Max
20.4
4.5
Unit
mW
μ
W/
MHz
Receiver dc Power
Receiver ac Power
Parameter
Symbol
V
I
Test Conditions
V
GPD
< 925 mV
dc
–
1 MHz
V
GPD
< 925 mV
450 MHz
(+V
IDTHH
)
–
(
–
V
IDTHL
)
With build-in termination,
center-tapped
Min
0.0
Typ
1.2
Max
2.4
Unit
V
Input Voltage Range, VIA or VIB
Input Differential Threshold
V
IDTH
–
100
—
100
mV
Input Differential Hysteresis
Receiver Differential Input Impedance
V
HYST
R
IN
—
80
—
100
—
120
mV
Parameter
Test Conditions
—
—
—
—
—
—
Min
80
80
–
40
3.1
1.4
—
Normal
100
100
—
—
—
0
Max
120
120
125
3.5
1.6
—
Unit
°
C
V
V
V
Transmit Termination Resistor
Receiver Termination Resistor
Temperature Range
Power Supply V
DD
33
Power Supply V
DD
15
Power Supply V
SS
相關(guān)PDF資料
PDF描述
ORT8850L Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
OS1001 Interface IC
OS1010 Optoelectronic
OS1011 SINGLE 1.8V, 200 KHZ OP, E TEMP, -40C to +125C, 8-PDIP, TUBE
OS1012 1.8V, 200kHz single low-cost, CMOS Op Amplifier on 120K Analog ROM process., -40C to +125C, 8-MSOP, T/R
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