參數(shù)資料
型號: ML60851DTB
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封裝: 10 X 10 MM, 0.80 MM PITCH, PLASTIC, TQFP-44
文件頁數(shù): 28/84頁
文件大?。?/td> 394K
代理商: ML60851DTB
FEDL60851D-01
1Semiconductor
ML60851D
33/83
End Point 0 Receive Control Register (EP0RXCON)
Read address
E0h
Write address
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
000
0000
0
After a bus reset
000
0000
1
Definition
000
0000
Configuration Bit:
The configuration bit of EP0 becomes “1” at the time of an USB bus reset. The
packets sent by the host computer to EP0 are received when this bit is “1”. This IC
does not respond to any transactions with this EP when this bit is “0”.
The transfer mode of EP0 is a control transfer and the end point address is fixed at 0h. Therefore, the values of D6
to D2 are fixed and other values written in them are invalid.
End Point 0 Receive Data Toggle Register (EP0RXTGL)
Read address
E1h
Write address
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
000
0000
x
After a bus reset
000
0000
x
Definition
000
0000
Configuration Bit (R)
Transfer Type
00 = Control transfer
End Point Address
Data Sequence Toggle Bit (R)
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